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D D D D D R R R R R A A A A A FT FT FT FT UM<nnnnn> FT D R R FT FT FT FT P89LPC9201/9211/922A1/9241/9251 User manual A A A A R R D D D NXP Semiconductors D R R A FT FT FT A A R R D D D D R A F FT FT A A R R D D the 9th data bit goes into RB8 in Special Function Register SCON and the stop bit is not saved. The baud rate is programmable to either 1⁄16 or 1⁄32 of the CCLK frequency, as determined by the SMOD1 bit in PCON. D FT FT A A R R D D D 10.4 Mode 3 R A Table 51. UART SFR addresses Register Description SFR location PCON Power Control 87H SCON Serial Port (UART) Control 98H SBUF Serial Port (UART) Data Buffer 99H SADDR Serial Port (UART) Address A9H SADEN Serial Port (UART) Address Enable B9H SSTAT Serial Port (UART) Status BAH BRGR1 Baud Rate Generator Rate High Byte BFH BRGR0 Baud Rate Generator Rate Low Byte BEH BRGCON Baud Rate Generator Control BDH 10.6 Baud Rate generator and selection The P89LPC9201/9211/922A1/9241/9251 enhanced UART has an independent Baud Rate Generator. The baud rate is determined by a value programmed into the BRGR1 and BRGR0 SFRs. The UART can use either Timer 1 or the baud rate generator output as determined by BRGCON[2:1] (see Figure 24). Note that Timer T1 is further divided by 2 if the SMOD1 bit (PCON.7) is set. The independent Baud Rate Generator uses CCLK. 10.7 Updating the BRGR1 and BRGR0 SFRs The baud rate SFRs, BRGR1 and BRGR0 must only be loaded when the Baud Rate Generator is disabled (the BRGEN bit in the BRGCON register is logic 0). This avoids the loading of an interim value to the baud rate generator. (CAUTION: If either BRGR0 or BRGR1 is written when BRGEN = 1, the result is unpredictable.) <Document ID> User manual © NXP B.V. 2009. All rights reserved. Rev. 01.xx — 5 February 2009 62 of 136 A The UART SFRs are at the following locations: R 10.5 SFR space D In all four modes, transmission is initiated by any instruction that uses SBUF as a destination register. Reception is initiated in Mode 0 by the condition RI = 0 and REN = 1. Reception is initiated in the other modes by the incoming start bit if REN = 1. FT 11 bits are transmitted (through TXD) or received (through RXD): a start bit (logic 0), 8 data bits (LSB first), a programmable 9th data bit, and a stop bit (logic 1). Mode 3 is the same as Mode 2 in all respects except baud rate. The baud rate in Mode 3 is variable and is determined by the Timer 1 overflow rate or the Baud Rate Generator (see Section 10.6 “Baud Rate generator and selection”).
