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P89LPC9201/9211/922A1/9241/9251 User manual
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1. Introduction
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UM<nnnnn>
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NXP Semiconductors
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The P89LPC9201/9211/922A1/9241/9251 are single-chip microcontroller, available in low
cost packages, based on a high performance processor architecture that executes
instructions in two to four clocks, six times the rate of standard 80C51 devices. Many
system-level functions have been incorporated into the
P89LPC9201/9211/922A1/9241/9251 in order to reduce component count, board space,
and system cost.
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19 P0.2/CIN2A/KBI2
P1.6
3
18 P0.3/CIN1B/KBI3
P1.5/RST
4
17 P0.4/CIN1A/KBI4
VSS
5
P3.1/XTAL1
6
P3.0/XTAL2/CLKOUT
7
14 P0.6/CMP1/KBI6
P1.4/INT1
8
13 P0.7/T1/KBI7
P1.3/INT0/SDA
9
12 P1.0/TXD
P1.2/T0/SCL 10
11 P1.1/RXD
P89LPC9201/9211/
922A1
16 P0.5/CMPREF/KBI5
15 VDD
002aae426
Fig 1.
P89LPC9201/9211/922A1 TSSOP20 pin configuration
P0.0/CMP2/KBI0
1
20 P0.1/CIN2B/KBI1/AD10
P1.7
2
19 P0.2/CIN2A/KBI2/AD11
P1.6
3
18 P0.3/CIN1B/KBI3/AD12
P1.5/RST
4
17 P0.4/CIN1A/KBI4/AD13/DAC1
VSS
5
P3.1/XTAL1
6
P3.0/XTAL2/CLKOUT
7
14 P0.6/CMP1/KBI6
P1.4/INT1
8
13 P0.7/T1/KBI7
P1.3/INT0/SDA
9
12 P1.0/TXD
P1.2/T0/SCL 10
11 P1.1/RXD
P89LPC9241/9251
16 P0.5/CMPREF/KBI5
15 VDD
002aae425
Fig 2.
P89LPC9241/9251 TSSOP20 pin configuration
<Document ID>
User manual
© NXP B.V. 2009. All rights reserved.
Rev. 01.xx — 5 February 2009
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P0.0/CMP2/KBI0
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1.1 Pin configuration