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2.2.21 LDC (LoaD to Control register) LoaD to Control register LDC <Operation> (EAs) → CR <Condition Code> N ∆ Z ∆ V ∆ C ∆ <Assembly-Language Format> (1) When CR is the status register (SR or CCR), the N, Z, V, and C bits are set according to the result of the operation. (2) When CR is not the status register (EP, TP, DP, or BR), the previous value remains unchanged. LDC <EAs>,CR (Example) LDC.B #H'01,DP <Operand Size> Byte Word (Depends on the control register) <Description> This instruction loads the source operand (immediate data, or general register or memory contents) into a specified control register (CR). The operand size specified in the instruction depends on the control register as indicated in Table 1-12 in Section 1.3.6, "Register Specification." Interrupts are not accepted and trace exception processing is not performed immediately after the end of this instruction. <Instruction Format> EA 1 0 0 0 1 c c c <Addressing Modes> Rn @Rn @(d:8,Rn) @(d:16,Rn)@–Rn @Rn+ @aa:8 @aa:16 #xx:8 #xx:16 Source Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes