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54 Figure 6-11 Read/write ports, modulo zero test, and datapath registers for clkspec_gcd16_16. To close out the clkspec_gcd16_16 RTL, the combinational logic for the FSM is shown in Figure 6-12. It is a straight-forward implementation of the ASM of Figure 6-9. RBR/V0.2.6/June 2013