Download Describing Synthesizable RTL in SystemC

Creating a Module With a Single SC_METHOD Process
Example 2-10 is a complete example of an RTL description of a
count zeros circuit that contains one SC_METHOD process,
control_proc( ), and two member functions, legal( ) and zeros( ). The
circuit determines in one cycle if an 8-bit value on the input port is
valid (no more than one sequence of zeros) and how many zeros the
value contains. The circuit produces two outputs, the number of
zeros found and an error indication. Figure 2-6 illustrates the module
and its ports.
Figure 2-6 Count Zeros Combinational Module
count_zeros_combo
in
control
proc
out
error
Example 2-10 Count Zeros Combinational Version
/****count_zeros_comb.h file***/
#include "systemc.h"
SC_MODULE(count_zeros_comb) {
sc_in<sc_uint<8> > in;
sc_out<sc_uint<4> > out;
sc_out<bool> error;
bool legal(sc_uint<8> x);
sc_uint<4> zeros(sc_uint<8> x);
void control_proc();
SC_CTOR(count_zeros_comb) {
SC_METHOD(control_proc);
sensitive << in;
}
};
Creating SystemC Modules for RTL Synthesis: Creating a Module With a Single SC_METHOD Process
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