Download MVME147BUG 147Bug Debugging Package User`s Manual

3
THE 147Bug DEBUGGER COMMAND SET
Yes
If Concurrent Mode is entered, a Power Cycle or Reset does
not terminate the Concurrent Mode. This is the mode
defaulted to if NVRAM should fail.
No
Power Cycle or Reset causes an exit from Concurrent Mode.
Seven VMEchip options are available:
Board Identification
Allows unique board identification.
GCSR Base Address offset
Sets the base address of the global control and
status register in the VMEbus short I/O map.
This value is an offset from the start
($FFFF0000) of the map.
Utility Interrupt Mask
This is used to enable the VMEchip to respond
to specific utility interrupt requests. Refer to
the MVME147/ MVME147S MPU VMEmodule
User’s Manual for bit definitions and functional
descriptions.
Utility Interrupt Vector number
Interrupt vector number ($8 to $F8) for the
utility interrupts. Must be in multiples of $8.
VMEbus Interrupt Mask
This is used to enable the VMEchip to respond
to specific VMEbus interrupt requests. Refer to
the MVME147/ MVME147S MPU VMEmodule
User’s Manual for bit definitions and functional
descriptions.
VMEbus Requester Level
This is used to configure the VMEbus requester
level (0 thru 3).
VMEbus Requester Release
This is used to configure the VMEbus requester
release mode (Release: On Request, When
Done, or Never).
Example 1:
147-Bug>env
Bug or System environment [B,S] = B? (CR)no change
Execute/Bypass Bug Self Test [E,B] = B? Echange to execute
Execute/Bypass SST Memory Test [E,B] = E? (CR)
Maintain Concurrent Mode (if enabled) through a Power Cycle/Reset
[Y/N] = Y? (CR)
Set VME Chip:
Board ID(def is 0) [0-FF] = $00? (CR)
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