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Download MPC603e RISC Microprocessor User`s Manual
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Page Table Search Operation vec300: .org vec0+0x400 vec400: #+ # Instruction TB miss flow # Entry: # Vec = 1000 # srr0 -> address of instruction that missed # srr1 -> 0:3=cr0 4=lru way bit 16:31 = saved MSR # msr<tgpr> -> 1 # iMiss -> ea that missed # iCmp -> the compare value for the va that missed # hash1 -> pointer to first hash pteg # hash2 -> pointer to second hash pteg # # Register usage: # r0 is saved counter # r1 is junk # r2 is pointer to pteg # r3 is current compare value .org vec0+0x1000 tlbInstrMiss: mfspr addi mfctr mfspr addi im0: mtctr im1: lwzu cmp bdneq bne l andi. bne mtctr mfspr mfspr mtcrf mtspr ori srw tlbli stb rfi #+ # Register # r0 # r1 # r2 5-42 r2, r1, r0 r3, r2, r1 r1, c0, im1 hash1 0, 8 iCmp r2, -8 8(r2) r1, r3 instrSecHash r1, +4(r2) r3, r1, 8 doISIp r0 r0, iMiss r3, srr1 0x80, r3 rpa, r1 r1, r1, 0x100 r1, r1, 8 r0 r1, +6(r2) # # # # # # # # # get first pointer load 8 for counter save counter get first compare value pre dec the pointer load counter get next pte see if found pte dec count br if cmp ne and if count not zero # # # # # # # # # # # # # # if not found set up second hash or exit load tlb entry lower-word check G bit if guarded, take an ISI restore counter get the miss address for the tlbli get the saved cr0 bits restore CR0 set the pte set reference bit get byte 7 of pte load the itlb update page table return to executing program usage: is saved counter is junk is pointer to pteg MPC603e RISC Microprocessor User’s Manual
