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PRELIMINARY
Document type:
User's Manual (MUT)
4.
Title:
Mod. V874A, 4-channel General Purpose Converter
Revision date:
15/01/2004
Revision:
1
3.11.
INTERRUPT LEVEL REGISTER .................................................................................................................... 35
3.12.
INTERRUPT VECTOR REGISTER ................................................................................................................. 35
3.13.
STATUS REGISTER 1 ................................................................................................................................ 35
3.14.
CONTROL REGISTER 1.............................................................................................................................. 37
3.15.
ADDRESS DECODER REGISTER.................................................................................................................. 38
3.16.
SINGLE SHOT RESET REGISTER................................................................................................................. 38
3.17.
MCST/CBLT CONTROL REGISTER ......................................................................................................... 38
3.18.
SW BERR REGISTER ................................................................................................................................ 39
3.19.
EVENT TRIGGER REGISTER........................................................................................................................ 39
3.20.
STATUS REGISTER 2 ................................................................................................................................ 39
3.21.
EVENT COUNTER_LOW REGISTER ........................................................................................................... 40
3.22.
EVENT COUNTER_HIGH REGISTER ........................................................................................................... 41
3.23.
INCREMENT EVENT REGISTER................................................................................................................... 41
3.24.
INCREMENT OFFSET REGISTER ................................................................................................................. 41
3.25.
FAST CLEAR WINDOW REGISTER ............................................................................................................ 41
3.26.
BIT SET 2 REGISTER ................................................................................................................................ 42
3.27.
BIT CLEAR 2 REGISTER............................................................................................................................ 44
3.28.
W MEMORY TEST ADDRESS REGISTER..................................................................................................... 44
3.29.
MEMORY TEST WORD_HIGH REGISTER ................................................................................................... 44
3.30.
MEMORY TEST WORD_LOW REGISTER ................................................................................................... 45
3.31.
CRATE SELECT REGISTER......................................................................................................................... 45
3.32.
TEST EVENT WRITE REGISTER.................................................................................................................. 45
3.33.
EVENT COUNTER RESET REGISTER........................................................................................................... 46
3.34.
VSET REGISTER........................................................................................................................................ 46
3.35.
VOFF REGISTER........................................................................................................................................ 46
3.36.
R MEMORY TEST ADDRESS REGISTER...................................................................................................... 46
3.37.
CLEAR TIME REGISTER............................................................................................................................. 46
3.38.
SW COMM REGISTER.............................................................................................................................. 46
3.39.
SLIDE CONSTANT REGISTER ..................................................................................................................... 47
3.40.
BAD REGISTER ....................................................................................................................................... 47
3.41.
THRESHOLDS MEMORY ............................................................................................................................ 47
3.42.
AUX BUS ............................................................................................................................................... 48
HARDWARE SET-UP AND INSTALLATION........................................................................................... 49
4.1. SAFETY INFORMATION................................................................................................................................. 49
4.1.1.
General safety precautions............................................................................................................ 49
4.1.2.
Terms and Symbols on the Product .............................................................................................. 50
NPO:
00103/99:TAPSy.MUTx/01
Filename:
V874A_REV1.DOC
Number of pages:
67
Page:
4