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Maps and Registers
6.4.21 NMI Status and Control Register
The following table provides information about NMI Status and Control Register.
Table 6-74 NMI Status and Control Register
Address Offset: 0x58
Bit
Description
Default
0
Diagnostic NMI Status
0
Access
LPC: r/w1c
IPMC: r/w
1
Diagnostic NMI Status
0
LPC: r
IPMC: r/w
2
Watchdog NMI Status
0
LPC: r/w1c
IPMC: r/w
3
Watchdog NMI Status
0
LPC: r
IPMC: r/w
7:4
Reserved
0
r
6.4.22 Telecom Clock Supervision Registers
6.4.22.1 Telecom Clocking Status Registers
The telecom backplane clocking status register indicates when the backplane input clock
signals are toggling.
Table 6-75 Telecom Backplane Clocking Status Register
Address Offset: 0x66
Bit
Description
Default
Access
0
0: CH1_CLK1A_IN is static or period is not in the correct
range.
PWR_GOOD:0
LPC: r
PWR_GOOD:0
LPC: r
1: CH1_CLK1A_IN is toggling
1
0: CH1_CLK1B_IN is static or period is not in the correct
range.
1: CH1_CLK1B_IN is toggling
210
ATCA-7365-CE Installation and Use (6806800L73M)