Download Internal Memory (RAM and ROM) User Guide

1. About Internal Memory Blocks
This user guide describes the Altera megafunction IP cores that implement the
following memory modes:
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RAM:1-Port—Single-port RAM
■
RAM:2-Port—Dual-port RAM
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ROM:1-Port—Single-port ROM
■
ROM:2-Port—Dual-port ROM
Altera provides two IP cores to implement the memory modes—the ALTSYNCRAM
and ALTDPRAM IP cores. The Quartus® II software automatically selects one of these
IP cores to implement memory modes. The selection depends on the target device,
memory modes, and features of the RAM and ROM.
f For more information about IP cores, refer to the Introduction to Altera IP cores.
Features
The internal memory blocks provide the following features:
June 2014
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“Memory Modes Configuration”
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“Memory Block Types”
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“Write and Read Operations Triggering”
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“Port Width Configuration”
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“Mixed-width Port Configuration”
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“Maximum Block Depth Configuration”
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“Clocking Modes and Clock Enable”
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“Address Clock Enable”
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“Byte Enable”
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“Asynchronous Clear”
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“Read Enable”
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“Read-During-Write”
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“Power-Up Conditions and Memory Initialization”
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“Error Correction Code”
Altera Corporation
Internal Memory (RAM and ROM)
User Guide