Download Premio Computer Premio Apollo/Shadowhawk Computer User's Manual
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CHAPTER 3 AMI® BIOS USERS GUIDE ICH Decode Select This option allows you to select the PCI decode timing of ICH. CPU BIST Enable This option allows you Enable or Disable the CPU Built-In Self Test. ICH Delayed Transaction The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles. Select Enabled to support compliance with PCI specification version 2.1. ICH DCB Enable This option allows you to Enable or Disable the ICH DMA Collection Buffer for LPC I/F. VGA Frame Buffer USWC This option allows you to Enable or Disable the VGA frame buffer. PCI Frame Buffer USWC This option allows you to Enable or Disable the PCI frame buffer. 3-10