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Intel® IQ80333 I/O Processor
Contents
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Intel® 80333 I/O Processor Block Diagram ................................................................................ 13
Serial-UART Communication ..................................................................................................... 19
JTAG Debug Communication ..................................................................................................... 19
Network Communication Example ............................................................................................. 20
Intel® 80333 I/O Processor Functional Block Diagram............................................................... 25
Board Form Factor ..................................................................................................................... 26
Intel® IQ80333 I/O Processor Evaluation Platform Board Peripheral Bus Topology.................. 31
Flash Connection on Peripheral Bus .......................................................................................... 32
JTAG Port Pin-out ...................................................................................................................... 36
RESET Sources ......................................................................................................................... 37
Default Switch Setting Switch S7A1 ........................................................................................... 38
Flash Connection to Peripheral Bus ........................................................................................... 46
Intel® 80333 I/O Processor Memory Map................................................................................... 48
Intel® 80333 I/O Processor Hardware Setup Flow Chart ........................................................... 55
Software Flow Diagram .............................................................................................................. 56
February, 2005
Customer Reference Board Manual