Download Freescale Semiconductor DSP56366 User's Manual

Programming Sheets
Date:
Application:
Programmer:
Sheet 2 of 5
Central Processor
Chip Operating Modes
MOD(D:A) Reset Vector
Description
See Core Configuration Section.
External Bus Disable
Stop Delay
Memory Switch Mode
CDP(1:0)
00
01
10
11
Core-DMA Priority
Core-DMA Priority
Core vs DMA Priority
DMA accesses > Core
DMA accesses = Core
DMA accesses < Core
Burst Mode Enable
TA Synchronize Select
Bus Release Timing
Asynchronous Bus Arbitration Enable
Address Priority Disable
Address Tracing Enable
Stack Extension Space Select
Extended Stack Underflow Flag
Extended Stack Overflow Flag
Extended Stack Wrap Flag
Stack Extension Enable
Memory Switch Mode
Patch Enable
23 22
PEN
21 20 19 18 17 16 15 14 13 12 11 10
MSW1 MSW0
9
8
7
SEN WRP EOV EUN XYS ATE APD ABE BRT TAS BE CDP1CDP0 MS
System Stack Control
Status Register (SCS)
Operating Mode Register (OMR)
Extended Chip Operating
Mode Register (COM)
Read/Write Reset = $00030X
6
SD
5
*0
4
3
2
1
EBD MD MC MB
0
MA
Chip Operating Mode
Register (COM)
* = Reserved, Program as 0
Figure D-2. Operating Mode Register (OMR)
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor
D-17