Download Connect Tech JB1 Specifications
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Nexys3 Reference Manual JTAG (both jumpers loaded), and board power is cycled. The FPGA will automatically reject any .bit files that are not built for the proper FPGA. After being successfully programmed, the FPGA will cause the "Done" LED to illuminate. Pressing the Reset button at any time will reset the configuration memory in the FPGA. After being reset, the FPGA will immediately attempt to reprogram itself from one of the PCM devices if the J8 Mode jumper is set to BPI or SPI mode. Power Jack Power Select Power Jumper Good LED Pmod Connectors Done LED JTAG Header Power Switch MODE Jumper Adept USB Port Reset Button 10/100 Ethernet VHDC Conncector VGA Port 7-seg Display USB HID Host Port USB UART LEDs Slide switches Push buttons Digilent's Adept software offers a simplified programming interface and many additional features as described below. The Adept USB port is fully compatible with all Xilinx tools, including the iMPACT programming software. The Adept features are always available, regardless of how the FPGA was programmed. Doc: 502-182 page 3 of 22