Download Renesas RX62N Group Specifications

RX62N Group
Ethernet Transmit and Receive Settings
1-bit (value: 1) output function
_phy_mii_write_1
Start
Write 0x00000006 to PIR register
No
MDC wait OK?
Output low-level from ET_MDC pin.
Set ET_MDIO pin to write direction and output high-level.
The MDC wait is defined as MDC_WAIT.
MDC_WAIT is defined in phy.h.
Yes
Write 0x00000007 to PIR register
No
Output high-level from ET_MDC pin.
Output high-level from ET_MDIO pin.
MDC wait OK?
Yes
Write 0x00000007 to PIR register
No
Output high-level from ET_MDC pin.
Output high-level from ET_MDIO pin.
MDC wait OK?
Yes
Write 0x00000006 to PIR register
No
Output low-level from ET_MDC pin.
Output high-level from ET_MDIO pin.
MDC wait OK?
Yes
End
Figure 3.16 Processing Sequence of MII/RMII Register Access (6)
R01AN0629EJ0101 Rev.1.01
Mar 31, 2011
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