Download Micro System SIMATIC S7-200

Off-Delay Timer
Off-delay timer
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Introduction
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Solution Description
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Solution Description
This is how our
program functions. It
has two active phases.
I0.0
Q0.0
Phase 2
Phase 1
Phase 1:
Activation of the latching circuit, I0.0 is "1"
(we assume that Q0.0 is not active).
If I0.0 is operated
AND
T37 has not elapsed
THEN
Q0.0 is activated (="1").
Q0.0 latches via this contact.
T37 does not yet run because
I0.0 is still "1".
Phase 2:
I0.0 is no longer operated.
The latch remains in force
until T37 has elapsed.
While the timer is running,
T37 is "0" and the NC contact
lets current pass.
The running of the timer can be
monitored here in test mode.
If Q0.0 is active AND I0.0 is
no longer operated, timer
T37 runs.
Revision
Latching
Pulse-Operated Switch
Off-Delay
Timer
Sequencer
Appendix
35