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System Memory Controller (SMC)
dpe_me When dpe_me is set, the transition of the dpelog bit from
false to true causes the Hawk to pulse its machine check interrupt
request pin (MCHK0_) true. When dpe_me is cleared, the Hawk does
not assert its MCHK0_ pin based on the dpelog bit.
3
GWDP The GWDP0-GWDP7 bits are used to invert the value that is
driven onto DP0-DP7 respectively during reads to the Hawk. This
allows test software to generate wrong (even) parity on selected byte
lanes. For example, to create a parity error on DH24-DH31 and DP3
during Hawk reads, software should set GWDP3.
Address
$FEF80070
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Data Parity Error Address Register
Name
DPE_A
Operation
READ ONLY
0 PL
Reset
DPE_A DPE_A is the address of the last PPC60x data bus parity error
that was logged by the Hawk. It is updated only when dpelog goes
from 0 to 1.
Address
$FEF80078
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Data Parity Error Upper Data Register
Name
DPE_DH
Operation
READ ONLY
0 PL
Reset
DPE_DH DPE_DH is the value on the upper half of the PPC60x data
bus at the time of the last logging of a PPC60x data bus parity error by
the Hawk. It is updated only when dpelog goes from 0 to 1.
3-60
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