Download MPC7450 RISC Microprocessor Family User`s Manual

Operand Conventions
bit is required to permit computation of the adjusted exponent value in the following
examples when the corresponding exception enable bit is one:
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2.2.2
Underflow during multiplication using a denormalized operand
Overflow during division using a denormalized divisor
Data Organization in Memory and Data Transfers
Bytes in memory are numbered consecutively starting with 0. Each number is the address
of the corresponding byte.
Memory operands can be bytes, half words, words, double words, quad words, or, for the
load/store multiple and load/store string instructions, a sequence of bytes or words. The
address of a memory operand is the address of its first byte (that is, of its lowest-numbered
byte). Operand length is implicit for each instruction.
2.2.3
Alignment and Misaligned Accesses
The operand of a single-register memory access instruction has an alignment boundary
equal to its length. An operand’s address is misaligned if it is not a multiple of its width.
The concept of alignment is also applied more generally to data in memory. For example,
a 12-byte data item is said to be word-aligned if its address is a multiple of four.
Some instructions require their memory operands to have certain alignment. In addition,
alignment can affect performance. For single-register memory access instructions, the best
performance is obtained when memory operands are aligned.
Instructions are 32 bits (one word) long and must be word-aligned.
The MPC7451 does not provide hardware support for floating-point memory that is not
word-aligned. If a floating-point operand is not word-aligned, the MPC7451 invokes an
alignment exception, and it is left up to software to break up the offending memory access
operation appropriately. In addition, some non-double-word–aligned memory accesses
suffer performance degradation as compared to an aligned access of the same type.
In general, floating-point word accesses should always be word-aligned and floating-point
double-word accesses should always be double-word–aligned. Frequent use of misaligned
accesses is discouraged because they can degrade overall performance.
2.2.4
Floating-Point Operands
The MPC7451 provides hardware support for all single- and double-precision
floating-point operations for most value representations and all rounding modes. This
architecture provides for hardware to implement a floating-point system as defined in
ANSI/IEEE standard 754-1985, IEEE Standard for Binary Floating Point Arithmetic.
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MPC7450 RISC Microprocessor Family User’s Manual
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