Download MPC7400 RISC Microprocessor User`s Manual

Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc...
INDEX
FP assist exception, 4-23
FP unavailable exception, 4-22
instruction-related exceptions, 2-41
ISI exception, 4-20
machine check exception, 4-16
overview, 1-34
performance monitor interrupt, 4-23, 11-2
PowerPC exception model, 1-34
program exception, 4-22
register settings
MSR, 4-9, 4-14
SRR0/SRR1, 4-8
reset exception, 4-15
returning from an exception handler, 4-13
summary table, 4-3
system call exception, 4-23
system management interrupt, 4-25
terminology, 4-2
thermal management interrupt exception, 4-27
trace exception, 4-23
Execution synchronization, 2-41
Execution units
floating-point unit (FPU), 1-14
integer units (IUs), 1-13
load/store unit (LSU), 1-14
system register unit (SRU), 1-14
timing examples, 6-22
Vector arithmetic logic unit (VALU), 1-13
Vector permute unit (VPU), 1-12
External control instructions, 2-68, 9-21, A-35, A-38
dcbtst instruction, 3-41
dcbz instruction, 3-42
DEC (decrementer register), 2-8
Decrementer exception, 4-22
Defined instruction class, 2-37
DHn/DLn (data bus) signals, 8-19, 8-37
Direct-store accesses, 9-7
Dispatch
considerations, 6-20
dispatch unit
overview, 1-10
resource requirements, 6-38
DMON (data bus monitor) signal, 8-37
DPn (data bus parity) signals, 8-20, 8-38
DRDY (data ready) signal, 8-36, 9-54
DRTRY (data retry) signal, 8-23, 9-27
DSI exception, 4-20
DSISR register, 2-7
DTIn (data transaction index) signals, 8-36
DTLB organization, 5-25
Dynamic branch prediction, 6-10
E
EAR (external access register), 2-8
Effective address calculation
address translation, 5-4
branches, 2-40
loads and stores, 2-40, 2-50, 2-54
eieio, 2-65
EMODE (enhanced mode) signal, 8-47, 9-42
Error termination, 9-29
Event counting, 11-11
Event selection
MMCRn registers, 11-12
PMCn registers, 11-13Ð11-21
Exceptions
alignment exception, 4-21
AltiVec assist exception, 4-1, 4-26
AltiVec technology overview, 7-15
AltiVec unavailable exception, 4-1, 4-28
checkstop state, 4-20
classification of exceptions, 4-3
conditions and exception types, 1-36
data address breakpoint facility, 4-20
data stream prefetching, 4-14
decrementer exception, 4-22
definitions, 4-14
DSI exception, 4-20
enabling and disabling exceptions, 4-11
exception prefix (IP) bit, 4-15
exception priorities, 4-5
exception processing, 4-8, 4-12
exception types and conditions, 1-36
external interrupt, 4-21
F
Finish cycle, definition, 6-2
Floating-point model
execution timing, 6-29
FE0/FE1 bits, 4-11
floating-point operands, 2-35
FP arithmetic instructions, 2-46, A-27
FP assist exceptions, 4-23
FP compare instructions, 2-48, A-29
FP load instructions, A-32
FP move instructions, A-33
FP multiply-add instructions, 2-47, A-28
FP rounding/conversion instructions, 2-47, A-28
FP store instructions, 2-56, A-33
FP unavailable exception, 4-22
FPSCR instructions, 2-48, A-29
IEEE-754 compatibility, 2-33
overview, 1-14
vector
FP arithmetic instructions, 2-77
FP compare instructions, 2-78
FP multiply-add, 2-77
FP rounding/conversion instructions, 2-78
Index
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Index-5