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MEMORY MAP
S3C72P9/P72P9 (Preliminary Spec)
LMOD — LCD Mode Register
LCD
F8DH, F8CH
Bit
3
2
1
0
3
2
1
0
Identifier
.7
.6
.5
.4
.3
.2
.1
.0
RESET Value
0
0
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
W
W
Bit Addressing
8
8
8
8
8
8
8
8
LMOD.7 – .5
LCD Output Segment and Pin Configuration Bits
0
0
0
Segments 40–43, 44–47, 48–51 and 52–55
0
0
1
Segments 40–43, 44–47 and 48–51; normal I/O at port 6
0
1
0
Segments 40–43 and 44–47; normal I/O at port 6 and port 7
0
1
1
Segments 40–43; normal I/O at ports 6, 7 and 8
1
0
0
Normal I/O at ports 6, 7, 8 and 9
NOTE: Segment pins that also can used for normal I/O should be configured to output mode
when the SEG function is used.
LMOD.4 – .3
LCD Clock (LCDCK) Frequency Selection Bits
0
0
When 1/8 duty: fxx/27 (256 Hz); when 1/12,1/16 duty: fxx/26 (512 Hz)
0
1
When 1/8 duty: fxx/26 (512 Hz); when 1/12,1/16 duty: fxx/25 (1024 Hz)
1
0
When 1/8 duty: fxx/25 (1024 Hz); when 1/12,1/16 duty: fxx/24 (2048 Hz)
1
1
When 1/8 duty: fxx/24 (2048 Hz); when 1/12,1/16 duty: fxx/23 (4096 Hz)
NOTE: LCDCK is supplied only when the watch timer operates. To use the LCD controller,
bit 2 in the watch mode register WMOD should be set to 1.
LMOD.2
LCD Duty and Selection Bits
0
1/8 duty (COM0–COM7 select)
1
1/16 duty (COM0–COM15 select)
NOTE: When 1/16 duty is selected, ports 4 and 5 should be configured as output mode;
when 1/8 duty is selected, ports 4 and 5 can be used as normal I/O ports.
LMOD.1 – .0
4-24
LCD Display Mode Selection Bits
0
0
All LCD dots off
0
1
All LCD dots on
1
1
Normal display