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Communication Processor Module NOTE The actual amount of memory allocated for this buffer should be greater than or equal to the contents of the MRBLR. Rx Data Buffer Pointer The receive buffer pointer, which always points to the first location of the associated data buffer, can be even or odd. The buffer can reside in internal or external memory. 16.14.16.17 UART TRANSMIT BUFFER DESCRIPTOR. Data is presented to the CP for transmission on an SCC channel by arranging it in buffers referenced by the channel’s UART transmit buffer descriptor (Tx BD) table. The CP confirms transmission or indicates error conditions via the BDs to inform the processor that the buffers have been serviced. OFFSET + 0 0 1 2 3 4 5 6 R RES W I CR A CM OFFSET + 2 7 8 P NS 9 10 11 12 RESERVED 13 14 15 CT DATA LENGTH OFFSET + 4 TX DATA BUFFER POINTER OFFSET + 6 NOTE: Items in bold must be initialized by the user. R—Ready 0 = The data buffer associated with this BD is not ready for transmission. The user is free to manipulate this BD or it’s associated data buffer. The CP clears this bit after the buffer is transmitted or after an error condition is encountered. 1 = The data buffer, which is prepared for transmission by the user, has not been transmitted yet or is currently being transmitted. No fields of this BD can be written by the user once this bit is set. Bit 1—Reserved W—Wrap (Final BD in Table) 0 = This is not the last BD in the Tx BD table. 1 = This is the last BD in the Tx BD table. After this buffer has been used, the CP will transmit data from the first BD that TBASE points to in the table. The number of Tx BDs in this table are programmable and determined only by the W-bit and the overall space constraints of the dual-port RAM. I—Interrupt 0 = No interrupt is generated after this buffer is serviced. 1 = The TX bit in the UART event register is set when this buffer is serviced by the CP, which can cause an interrupt. 16-204 MPC821 USER’S MANUAL MOTOROLA
