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1
Introduction
1.1
Overview
GRSPW / GRSPW-FT
The GRSPW core implements a SpaceWire Codec with RMAP support and AMBA host interface.
The core implements the ECSS SpaceWire standard with the protocol identification extension and
Remote Memory Access Protocol (RMAP).
Receive and transmit data is autonomously transferred between the SpaceWire Codec and the AMBA
AHB bus using DMA transfers. Through the use of receive and transmit descriptors, multiple
SpaceWire packets can be received and transmitted without CPU involvement. The GRSPW control
registers are accessed through an APB interface.
GRSPW
AHB master
SpaceWire signals
SpaceWire
Codec
RMAP Ctrl
APB slave
Registers
AMBA AHB
AMBA APB
Figure 1. GRSPW block diagram
1.2
Example application
The GRSPW core has been designed to fit into an architecture from which a large variety of applications can be derived. The architecture is centered around the AMBA Advanced High-speed Bus
(AHB), to which the GRSPW core and other high-bandwidth units are connected. Low-bandwidth
units connected to the AMBA Advanced Peripheral Bus (APB) which is accessed through an AHB to
APB bridge. The architecture is shown in figure 2.
LEON3FT
32-bit SPARC
Integer Unit
I-cache D-cache
Interrupt
FPU
Debug
Support
Unit
UART
Debug
Link
JTAG
Debug
Link
On-Chip
Memory
with EDAC
Timers
2 x UART
16 x GPIO
AHB / APB
32-bit AMBA AHB
AHB
CTRL
Memory
Controller
with EDAC
32
PROM/SRAM
SDRAM
Controller
with EDAC
SpaceWire
Codec
Interface
CAN
2.0
Controller
LVDS I/F
CAN-2.0
Mil-Std-1553
BC/RT/MT
Interface
Mil-Std-1553
RT
Interface
Dual-1553
Dual-1553
32
SDRAM
Figure 2. Architectural block diagram of a typical system using the SpaceWire codec
Copyright Aeroflex Gaisler AB
December 2008, Version 1.0.2