Download ANI sr2, byte - Renesas Electronics

CHAPTER 14
INSTRUCTION SET
EXA
(Exchange V, A, EA and V', A', EA')
<1> Operation code
:
0
0
<2> Number of bytes :
1
<3> Number of states :
4 (4)
0
1
0
0
0
0
→
→
V→
← V', A ← A', EA ← EA'
Exchanges the contents of V and A registers and EA with the contents of the V' and A' registers and EA'.
<4> Function
:
<5> Flags affected
:
SK ← 0, L1 ← 0, L0 ← 0
:
0
<2> Number of bytes :
1
<3> Number of states :
4 (4)
→
H→
← H', L ← L'
EXH
(Exchange HL and H'L')
<1> Operation code
<4> Function
:
1
0
1
0
0
0
0
Exchanges the contents of H and L registers with the contents of the H' and L' registers.
:
SK ← 0, L1 ← 0, L0 ← 0
:
0
<2> Number of bytes :
1
<5> Flags affected
BLOCK
(Block Data Transfer)
<1> Operation code
0
1
1
0
0
0
1
<3> Number of states :
13 × (C+1), (4)
<4> Function
(DE) ← (HL), DE ← DE+1, HL ← HL+1, C ← C–1, end if borrow.
:
Performs a block transfer to the memory addressed by the DE register pair comprising the number of bytes
specified by the C register used as a counter (C register value +1) of the contents of the memory addressed
by the HL register pair.
Each time a byte is transferred, HL and DE are auto-incremented and the C register is decremented. When
the C register value reaches FFH, the instruction is terminated and the program moves on to the next
instruction.
Interrupts can be acknowledged during repeated transfers by means of a BLOCK instruction, in which case
the transfer continues after returning from the interrupt service routine.
<5> Flags affected
:
SK ← 0, L1 ← 0, L0 ← 0
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