Download User Manual - ARM DS-5 Development Studio

The evaluation board for
TOSHIBA TMPM369FDFG
user's manuals
Revision １.2.0
2014/11/27
A product specification is an object of change without a preliminary announcement
･Introduction
This manual is a user's manual of the evaluation board for Toshiba TMPM369FDFG.
･Table of contents
Chapter　１，　Outline
Chapter　２，　Ｈａｒｄｗａｒ　discription
･Revision history
Date
Revision
2012/9/12
Revision １．００
2013/4/25
Revision １．１０
2014/11/27
Revision １．２０
Sheet
Contents
numbe
First edition creation
default　jumper　configuration
JP5:OPEN →JP5:CLOSE
p7
5, 16-bit timer (TMRB)
16 channels -> 8 channels
p9
24, Interruption function
･ 110 kinds of insides
-> 112 kinds of insides
･ 17 kinds of exteriors : (NMI is included).
-> 16 kinds of exteriors : (NMI is
excluded)
33, Package
･LQFP144-P-2020-0.5 -> LQFP144
Chapter　１，　Outline
Evaluation Board for TOSHIBA TMPM369FDFG enable you to create and test working programs
based on the Toshiba TMPM360 family of ARM Cortex™-M3 processor-based devices
【Features】
■　80MHz ARM Cortex™-M3 processor-based MCU in 144-pin LQFP
■　On-Chip Flash: 512KB (TMPM369FDFG)
On-Chip Flash: 256KB (TMPM369FYFG)
■　On-Chip RAM: 128KB (TMPM369FDFG)
On-Chip RAM: 64KB (TMPM369FYFG)
■　USB 2.0 Host
■　USB 2.0 Device
■　CAN 2.0B Interface
■　EterMAC　(10/100Base-T)
On a board LAN-PHY made from SMSC (LAN8710A) is mounted.
■　1２bit　ADC（１６ch　：　AINA0～AINA3，　AINB0～AINB11）
Multi-rotation volume　for ADC Input（2ch-only：AINA０、AINB6）
■　1０bit　DAC（２ｃｈ　：　DA０，DA1）
■　SIO/UART　ch０〜ch３
Only the channel 0 equips DSUB-9pin connector with a RS-232C driver / receiver..
■　Full/UART　ch4〜ch5
Only the channel 4 equips DSUB-9pin connector with a RS-232C driver / receiver..
■　5 LEDs and 6 push-buttons
LED1〜LED4　---　Status display LED （This LED is connected to PC7〜PC4 of a port. ）
LED5　：LED for power light
S1：　Push switch for /reset
S2：　Push switch for /NMI
S3〜S6　：　Push switch for a test
■　Power via USB connector
As an option An AC adaptor jack (CN13)
and an external ５V-Power input connector (CN1) are equipped.
（However, in order to usually perform electric supply from a USB connector,
CN1 and CN13 suppose un-mounting.）
■　Debug Interface Connectors
■10-pin Cortex debug (0.05 inch connector)
■20-pin Cortex debug + ETM Trace (0.05 inch connector)
■20-pin (0.10inch connector) - ARM Standard JTAG Connector
(Page1)
+3.3V
ＶＡＡ３．３
TMPM369FDFG
【Fig.1】
Evaluation_for_TOSHIBA_
TMPM369FDFG　whole_block_diagram
AVDD
LAN8710AI
DVDD
DVSS
AVSS
CN１１
ＡＧＮＤ
ＤＧＮＤ
GPIO
＆
EBIF
CN１２
Expantion
_Connector
GPIO
＆EBIF
MII
25MHz
USBHPON
PK3/USBHPON/SP0DO/SIO_SCL0
TPS2051C
PK1/USBOC/SP0FSS/INT8/TB6OUT
USB
_Host
MPT
（PMD）
Bus_Power
２７
USB　Host
CN３
（TYPE_A )
USBH0P
２７
１５K
ＶＡＡ３．３
１５K
ADC_input（AINA0）
１０Ｋ_Volume
CN１０
＋５V
Current_Limited_IC
/USBOC
MPT（PMD)
Output
10/100Base-T　Ethernet_
10/100Base
Ethernet_PHY
MII
信号
（１７Pin）
SN65220
TRANSIENT
_SUPPRESSORS
０
PI0/AINA0/INT9
PK0/USBDPON/(INTD)
USP_PON
0.1u
USB_DDP
USBDP
USB0M
ADC　Input
ＡＧＮＤ
PI0/AINA0/INT9
12bit
_ADC
(16ch)
USB_DDM
USB
_Device
PJ2/AINB6
CAN
ＶＡＡ３．３
ADC_input（AINB6）
１０Ｋ_Volume
０
CAN-transceiver
CTXD
DAC　Output
10bit
_DAC
（２ｃｈ）
PJ2/AINB6
TJA1040
６０
JP１２
CN９
１２０
６０
CRXD
CAN
１０００ｐ
0.1u
ＡＧＮＤ
Full
_UART
ADM3202ARU
CN８
Full-UART
RTS４
SSP
External－５V
－power-input
CN1
RXD４
CTS４
User_LED　ｘ４
J_3.3V
LED1～LED4
(no-mount)
＋５V
CN1３
JP６
(n o- moun t)
JP７
LDO
Common
_Mode
_Filter
EXT _5V
RXD0
+3.3V
LED５
GPIO
J P１３
GND_IN
PB6/BELL/SCOUT/TB3OUT/ BOOT
JP1
NMI-SW
/NMI
JP２ 3 2 1
S2
PE2/TXD0/A2/A18/TB1OUT
JP３ 3 2
USB　Device
U_5V
CN２
PK0/USBDPON/(INTD)
Filter
1
PE3/SCLK0/A3/A19/CTS0/TB0OUT
JP４ 3 2
1
RESET-SW
/RESET
PE5/TXD1/A5/A21
２７
S1
USB_DDP
２７
JP8
SN65220
１．５K
１Mx2
+3.3V
TRANSIENT
_SUPPRESSORS
PE0/A0/A16/INT4/TB0IN
USB_DDM
PE0/A0/A16/INT4/TB0IN
1 6MHz
DTC12 3
J P１０
XT1
3 2.7 68
KHz
10-pin Cortex debug
(0.05 inch connector)
X1
X２
DTA 123
JP９
CN７
SIO/UART
RS-232C
DRV/REV
TXD0
S３～S6
JP５
AC-adapter-jack
ADM3202ARU
SIO_
UART
+3.3V
User_Push-Sw×４
USB-miniB
（TypeB）
RS-232C
DRV/REV
TXD４
/Debug
I/F
CN４
J_3.3V
CN５
20-pin Cortex debug
+ ETM Trace
(0.05 inch connector)
CN６
20-pin (0.10inch connector)
- ARM Standard JTAG Connector
JTAG
XT２
JP11
(Page2)
【Ｆｉｇ．２】
Evaluation_for_TOSHIBA_
TMPM369FDFG
PCB Main parts　image
１３５．０
ｍｍ
4-3.2Φ
5mm
３ １
７１
5mm
CN11
JP５
７２
Full-UART
（DSUB-9PIN)
CN８
S４
U7
１００．０
ｍｍ
USBHost
USBDevice
CN１３
37
72
U4 U5
73
36
CN５
JP４
CN７
U6
CPU
（U1)
U8
CN4
JP２
1
144
VOL２
VOL1
S１
Y2
106
L3
S２
107
Y1
DC- IN
７４
CN９
Y3
U9
CN１ JP６ JP７
CAN
JP12
U2
（LDO)
JP８ JP１１
CN２
（20PIN-JTAG)
JP３
JP１０
JP９
U3
DCJACK
JP1
U10
JP１３
CN３
CN６
（10PINCortex-Debug)
S５
S６
U11
SIO-UART
（DSUB-9PIN)
４ ２
（20PIN-Cortex
-Debug+ETM)
S３
LAN
CN１０
LAN-PHY
CN1２
７３
１４４
5mm
１４３
5mm
U1
U2
CPU
LDO
TMPM369FDFG (TMPM369FYFG)
LD1117S33CTR
TOSHIBA
ST-Microelectronics
U3
U4
U5
USB-Transient-Suppressor
Digital Transistor PNP
Digital Transistor NPN
RS-232C
Line Drivers/Receivers
RS-232C
Line Drivers/Receivers
CAN TRANSCEIVER
SN65220DBVT
DTA123EE
DTC123EE
TI
Rohm
Rohm
ADM3202ARUZ
Analog Devices Inc
ADM3202ARUZ
Analog Devices Inc
TJA1040T
NXP Semiconductors
U6
U7
U8
U9
U10
U11
LAN-PHY
LAN8710AI
Current-Limited,
Power-DistributionTPS2051CDBVT
Switches
USB-Transient-Suppressor SN65220DBVT
SMSC
TI
TI
(Page3)
4- 3 . 2 Φ
１３５．０
ｍｍ
5mm
３ １
７１
5mm
CN11
JP５
７２
Full-UART
（DSUB-9PIN)
CN８
S４
U7
U1 1
USBHost
USBDevice
CN１３
37
36
72
JP１０
U4 U5
JP４
JP３
73
CPU
（U1)
JP２
１ ２ ３
１ ２ ３
CN５
CN７
U6
U8
CN4
1
144
VOL２
VOL1
（LDO)
S１
Y2
106
Y1
L3
S２
107
DC- IN
７４
CN９
Y3
U9
CN１ JP６ J P７
CAN
JP12
U2
JP８ JP１１
CN２
DCJACK
JP1
U10
JP９
U3
（20PIN-JTAG)
１ ２ ３
JP１３
CN３
CN６
（10PINCortex-Debug)
S５
S６
１００．０
ｍｍ
SIO-UART
（DSUB-9PIN)
４ ２
（20PIN-Cortex
-Debug+ETM)
S３
LAN
CN１０
LAN-PHY
CN1２
７３
１４４
5mm
１４３
5mm
J u m p e r C LO SE
【Ｆｉｇ．３】
Evaluation_for_TOSHIBA_
TMPM369FDFG
Jumper configration (default)
Default configuration
JP７：OPEN
→　With no electric supply
JP1：OPEN
→　Normal
JP８：OPEN
→　With no pull-up
JP２　：２－３　CLOSE
→　X1　OSC　select
JP３：１－２　CLOSE
→　X1　OSC（１６＊３）
JP４：２－３　CLOSE
→　ＳＩＯ BOOT
JP５：CLOSE
→　Target_board power
supply to CN6-1PIN
JP６：CLOSE
→　It supplies from
a USB Device connector
（CN2)
JP９：CLOSE
→　USB_DP terminal
１MΩ　pull-down
JP１０：CLOSE
→　USB_DM terminal
１MΩ　pull-down
JP１１：CLOSE
→　Control port (PE0)
It is used.
JP１２：OPEN
→ Termination is not　used.
JP１３：CLOSE
→　The regulator output
on a board is used
(Page4)
【Ｔａｂｌｅ．１】
Evaluation Boardfor TOSHIBA TMPM369FDFG
【 Jumper pin setting table】
Reference
The number
of pins
Silk name
Function
JP１
２PIN
JP1　/BOOT
･Boot mode select
JP1：OPEN　→　Normal
JP1：CLOSE　→　BOOT　Mode
JP２
JP３
JP４
JP５
JP６
JP７
３PIN
３PIN
３PIN
２PIN
２PIN
２PIN
JP２
１　USBCLK
２
３　X1　OSC
･Selection of a clock
JP２：１－２　CLOSE→　USBCLKl
JP２：２－３　CLOSE→　X1　OSC
JP３
１　X1　OSC（１６＊３）
２
３　USB_ECLK
･USB Clock selection
JP３：１－２　CLOSE→　X1　OSC（１６＊３）
JP３：２－３　CLOSE→　USB_ECLK
JP４
１　USB_BOOT
２
３　SIO_BOOT
･Boot mode kind selection
JP４：１－２　CLOSE→　USB BOOT
JP４：２－３　CLOSE→　ＳＩＯ BOOT
JP５　JTAG_POWER
･3.3V target supply source selection
JP５：OPEN　→　With no target supply to CN6-1pin
JP５：CLOSE　→　It supplies target +3.3V-power to JTAG（CN6-1pin)
JP６　USB_５V
･5V electric supply source selection
JP６：OPEN　→　With no electric supply
JP６：CLOSE　→　It supplies from a USB Device connector
（CN2)
JP７　EXT_５V
･5V electric supply source selection
JP７：OPEN　→　With no electric supply
JP７：CLOSE　→　It supplies 5V from
an external connector (CN1 or CN13).
･USB_DP terminal １．５KΩ Compulsive pull-up
JP８：OPEN　→　With no pull-up
JP８：CLOSE　→　USB_DP terminal Compulsive pull-up
JP８
２PIN
JP８　DP_PULL-UP
JP９
２PIN
JP９　DP_PULL-DOWN
･USB_DP terminal １MΩPulldown
JP９：OPEN　→　With no pull-down
JP９：CLOSE　→　USB_DP terminal １MΩ　pull-down
JP１０
２PIN
JP１０　DM_PULL-DOWN
･USB_DM terminal １MΩPulldown
JP１０：OPEN　→　PULL-DOWN無し
JP１０：CLOSE　→　USB_DM terminal １MΩ　pull-down
･USB_DP terminal Compulsive pull-up control port (PE0) enabling
JP１１
２PIN
JP１１　PE0－EN
JP１１：OPEN　→ Control port (PE0) It is not used.
JP１１：CLOSE　→　Control port (PE0) It is used.
(Page5)
Chapter　２，　Ｈａｒｄｗａｒ　discription
The TMPM369FDFG is a 32-bit RISC microprocessor series with an ARM Cortex-M3 microprocessor core．.
The internal composition of CPU is shown in Fig.４.
【 Ｆ ｉｇ ． ４ 】 ＴＭ Ｐ Ｍ３ ６ ９ Ｆ Ｄ Ｆ Ｇ Ｃ Ｐ Ｕ i n t e r n a l b l o c k _ d i a g r a m
C or t e x - M 3
JT AG / SW D
ETM
Ether
MAC
NVIC
USB
Device
μ DM A
Ａ Ｈ Ｂ Ｌ ｉ ｔｅ Ｂ ｕ ｓ Ｍａ ｔ ｒ ｉ ｘ
Ｆ Ｌ ＡＳ Ｈ＿ ＲＯＭ
Main＿ＲAＭ
MP T/ PMD /ENC
CG
Backu p_RAM
Ethe r_ MAC
WDT
ＡＨＢ　to　I/O　Br ige
U S B _H O ST
ＡＨＢ　Ｌｉｔｅ　Ｂｕｓ　０
B O OT ＿ ＲＯ Ｍ
PORT
RTC
1 6bi t　TIM ER
SIO/ UART
（ 4byte　FIF O ）
USB_ Devi ce
SBI
OFD
CAN
RM C
Ａ ＨＢ　to　APB　Br idge
1 2b it　ADC
1 0b it　DAC
SSP(SPI)
Ext er na l_ B US _ I/F
F u ll- UAR T
(Page6)
【CPU functional outline】
１，ARM Cortex-M3 microprocessor core
（ａ），. Improved code efficiency has been realized through the use of Thumb-2 instruction.
・ New 16-bit Thumb instructions for improved program flow
・ New 32-bit Thumb instructions for improved performance
・ New Thumb mixed 16- / 32-bit instruction set can produce faster, more efficient code.
（ｂ），. Both high performance and low power consumption have been achieved.
[High performance]
・ Both high performance and low power consumption have been achieved.
・ Division takes between 2 and 12 cycles depending on dividend and devisor
[Low Power consumption]
・ Optimized design using a low power consumption library
・ Standby function that stops the operation of the micro controller core
（ｃ），..High-speed interrupt response suitable for real-time control
・ An interruptible long instruction
・ Stack push automatically handled by hardware
２，　High-speed writing which demonstrates an effect at the time of
high-speed write-in & low power consumption
and mass production by Toshiba NANO FLASH- technology, and development
３，　On Chip program memory and data memory
･　On-Chip Flash: 512KB (TMPM369FDFG)
On-Chip Flash: 256KB (TMPM369FYFG)
･　On-Chip RAM: 128KB (TMPM369FDFG)
On-Chip RAM: 64KB (TMPM369FYFG)
４，　DMA controller (DMAC): 32 channel / 2 unit
The candidate for transmission： A built-in memory, built-in I/O, and an external memory
５，　16-bit timer (TMRB) : 8 channels
・16-bit interval timer mode
・16-bit event counter mode
・16-bit PPG output (4channel timer can start synchronously)
・Input capture function
６，　Real time clock (RTC) : 1channel
・Clock (hour, minute and second)
・Calendar (month, week, date and leap year)
・Alarm (Alarm output)
・Alarm interrupt
７，　Watchdog timer (WDT) : 1 channel
Watchdog timer (WDT) generates a reset or a non-maskable interrupt (NMI).
・26 Stage binary counter
･ Watchdog timer out function
８，　General-purpose serial interface (SIO/UART) : ４ channels
Either UART mode or synchronous mode can be selected (4byte FIFO equipped)
(Page7)
９，　Serial bus interface (I2C/SIO)：: ３ channels
Either I2C bus mode or synchronous mode can be selected.
１０，　Synchronous serial port (SSP) : ３ channelｓ
Support SPI / SSI / Microwire
１１，　Full UART:2 Channel
8－Line Type UART / IrDA 1.0 Mode Select is Possible.
１２，　10-bit AD converter (ADC) : 16 channels
・Start by an internal timer trigger
・Fixed channel / scan mode
・Single / repeat mode
・AD monitoring 2 channels
・Conversion speed 1.0 μsec (@ fsys = 80 MHz、Normal_Mode)
･Fast conversion by interleave mode　(conversion time ： a maximum of 0.5microsec)
１３，　10bit DA Converter (DAC) : 2 Unit (2 Channel)
･ VREFH cut function (Power down mode)
･ Output current : 1 mA
･ Seduced time : 1microsec
･ Signal generation function
１４，　USB2.0 Full Speed Device : 1 Channel
･ It is based on Universal Serial Bus Specification Rev2.0.
･ End point : 8 channel
･ Control/Bulk/Interrupt/Isochronus mode
･ Full speed 12Mbps (low speed is un-supporting)
１５，　USB host controller : 1 channel
・Universal serial bus (Rev 2.0 standard)
・Open HCI for USB Release 1.0a
･･Control/Bulk/Interrupt/Isochronus mode
・12Mbps(full speed)　：(Low speed is un-supporting)
１６，　CAN : 1 channel
・Version 2.0B supported
・32 mail boxes
・Maximum transfer speed : 1 Mbps
１７，　Ethernet MAC:1 Channel
･ IEEE802.3u conformity
･ Flow control (IEEE802.3x / back pressure system)
･ 10Mbps / 100Mbps correspondence
･ MII (Media Independent Interface) correspondence
･ High-speed communication by exclusive DMA and a total of 8-K byte FIFO
･ Magic packet detection function
１８，　Remote Control Judging Function (RMC) : 1 Channel
・ It is package reception to　７２bit.
･ Noise canceller function
･ Reader code detection function
(Page8)
１９，　Multiple-purpose - timer (MPT):4 channel
･motor control (PMD:2 channel)
･IGBT control
･16-bit timer
２０，　Encoder input function: 2 channel
･Incremental form encoder correspondence
２１，　LVD/POR Function : 1 Unit
２２，　Oscillation Frequency Detection　：1 Unit
２３，　External bus interface: ： 1 unit
･separation / multiplexer bus　：　8 bit / 16 bit width
･ chip select / wait controller:　： 4 channel
２４，　Interruption function
･ 112 kinds of insides : a priority setup of 7 level is possible.
(Watchdog timer interruption is excluded)
･ 16 kinds of exteriors : a priority setup of 7 level is possible (NMI is excluded)
２５，　Input / output ports (PORT)
･I/O port : 10１ pins
･Output port : 1 pins
２６，　Standby function
･Standby mode　： IDLE, STOP1, STOP2
･IDLE　：:CPU stop
･STOP1/STOP2：: All the circuit stops except RTC and a remote control judging circuit
(STOP2 At the time of the mode in part a circuit power supply interception)
２７，　Clock Generator
･ PLL built-in (3, 4, 5, 6, 8, and 10times PLL frequency change is possible)
･ Clock gear function : dividing is possible in a high-speed clock to 1/1, 1/2, 1/4, 1/8, and 1/16.
２８，　Endian
･Little endian
２９，　Debugging interface
･JTAG/SWD/SWV/TRACE(DATA 4bit)
３０，　Maximum operating frequency
･80 MHz
(the time of external oscillator 8MHz, 10 MHz, or 16MHz use
ｏｒ　built-in oscillator 10MHz use ）
３１，　The range of operating voltage
･2.7V～3.6V (at the time of USB functional disuse)
･3.0V～3.6V (at the time of USB functional use)
３２，　Operating temperature range
･　−40℃～~ 85℃　（Except the time of flash writing / erase）
･　0℃ ～ 70℃　（At the time of flash writing / erase）
３３，　Package
･LQFP144 (20mm x 20mm, 0.5mm pitch)
(Page9)