Download 5.1 Programming the SMCS116SpW

SMCS116SpW
User Manual
Astrium GmbH
Doc No: SMCS_ASTD_UM_116
Rev.:
1.2
Date:
16.06.2008
Page:
2 of 157
Document Revision History
Revision
Date
Responsible
Modifications
1.0
July 2007
P. Rastetter
First release
1.1
October
2007
U. Liebstückel
Update in chapter 8.6: time code
control register TIME_CNTRL
Chapter 12.14 and 12.15
Add new timing figures for FIFO
interface passive write and FIFO
interface passive read.
1.2
June 2008
U. Liebstückel
Chapter 5.2.1
Replace “Protocol Select Register”
by “Protocol Control Register”
Chapter 7.1.4
Replace “Header x register” by
“Packet Header x register”
Chapter 7.1.6
Replace “ADC_PSIZE” by
“ADC_TEST”
Chapter 8.2.3:
Table: change description of D1 in
register ISR_1
Add description of D1 in register
ISR_1.
Update description of D2 in
register ISR_1
Chapter 8.6:
add description for bit D3 & D4
Chapter 9.1.4:
Add note to the HDRCTRL register
description.
Add bit D1 in register description
of CHKEN
Chapter 9.1.5:
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