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Bus Operation C1 CW C2 C1 C2 BCLK A31–A0 MISCELLANEOUS ATTRIBUTES R/W SIZ1–SIZ0 LONG TS TIP D31–D0 SAS TRA MC68040 ACKNOWLEDGE TERMINATION MODE TA TEA TRA NATIVE-MC68060 ACKNOWLEDGE TERMINATION MODE TA TEA READ CYCLE RETRY SIGNALED RETRY CYCLE Figure 7-39. Retry Read Bus Cycle Timing The MC68060 considers the resulting second, third, and fourth long-word bus cycles of a burst-inhibited line transfer as part of the original line transfer cycle. Therefore, the MC68060 interprets a retry termination during these bus cycles as though they were part of the original line transfer, and depending on the acknowledge termination mode, a retry termination is either interpreted as a bus error (MC68040 mode) or ignored (native-MC68060 mode). Negating the bus grant (BG) signal on the MC68060 while indicating a retry termination provides a relinquish and retry operation for any bus cycle that can be retried (see Figure 7-44). If retrying a bus cycle that is part of a locked sequence of bus cycles, a relinquish and retry of the bus requires BGR be asserted along with BG negated to cause the processor to abort any following locked bus cycles that are a part of the locked sequence. 7-50 M68060 USER’S MANUAL MOTOROLA
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