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Errata Sheet
Functional Deviations
is already lost in an FCU trap condition, usage of the global and lower context
registers without previously saving this information is acceptable.
CPU_TC.111 Imprecise Return Address for FCU Trap
The FCU trap is taken when a context save operation is attempted but the free
context list is found to be empty, or when an error is encountered during a
context save or restore operation. In failing to complete the context operation,
architectural state is lost, so the occurrence of an FCU trap is a non-recoverable
system error.
Since FCU traps are non-recoverable system errors, having a precise return
address is not important, but can be useful in establishing the cause of the FCU
trap. The TriCore1 CPU does not generate a precise return address for an FCU
trap if the cause of the FCU trap was one of the following trap types: FCD, DAE,
DIE, CAE or NMI.
In each of these circumstances the return address may be invalid.
Workaround
None
CPU_TC.113 Interrupt may be taken during Trap entry sequence
A problem exists whereby interrupts are not correctly disabled at the very
beginning of a trap entry sequence, and under certain circumstances an
interrupt may be taken at the start of a trap handler. The problem occurs when
an interrupt request is received by the TriCore CPU within a window spanning
a single clock cycle either side of a trap condition being detected, and where
interrupts are enabled and the interrupt priority number is higher than the
current CPU priority number (CCPN). In this case the trap entry sequence
begins and the upper context registers are stored to the appropriate CSA.
However, before the first instruction of the trap handler is executed the interrupt
condition is detected and the interrupt handler entered at a time when interrupts
should be disabled. This problem affects all trap types but does not affect
TC1736, EES-AA, ES-AA, AA
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Rel. 1.2, 26.02.2010