Download MC68PM302 Integrated Multiprotocol Processor with PCMCIA

PCMCIA Controller
Freescale Semiconductor, Inc.
68K Memory Map
Transmit Data DMA Block
2K Window
ADDRESS
Freescale Semiconductor, Inc...
PC
PCMCIA BUS
Common Memory Base
Address Register 1
(Transmit Data)
Common Memory Base
Address Register 2
(Receive Data)
ADDRESS
Receive Data DMA Block
2K Window
Figure 5-4. Use of the CMBARs for Fast Mode Transmit and Receive Data Transfers.
To eliminate paging entirely, the PCMCIA controller may be programmed not to drive the
high address lines from the base register, but rather drive the ABUF pin which has the appropriate timing to control external address buffers. This address buffer control line is connected to external address buffer circuitry that interfaces the upper PCMCIA address bus
lines to the 68000 bus. This feature is enabled by setting the ABUF bit in the PCMR register
(See Figure 5-5)
MC68PM302 REFERENCE MANUAL
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