Download Microprocessor Peripherals UPI- 41A 41AH 42 42AH User`s Manual

UPI-41A/41AH/42/42AH USER’S MANUAL
CHAPTER 1
INTRODUCTION
Accompanying the introduction of microprocessors
such as the 8088, 8086, 80186 and 80286 there has been
a rapid proliferation of intelligent peripheral devices.
These special purpose peripherals extend CPU performance and flexibility in a number of important
ways.
Table 1-1. Intelligent Peripheral Devices
8255 (GPIO)
Programmable Peripheral
Interface
8251A(USART)
Programmable
Communication Interface
8253 (TIMER)
Programmable Interval Timer
8257 (DMA)
Programmable DMA Controller
8259
Programmable Interrupt
Controller
82077AA
Programmable Floppy Disk
Controller
8273 (SDLC)
Programmable Synchronous
Data Link Controller
8274
Programmable MultiprotocolSerial Communications
Controller
8275/8276 (CRT) Programmable CRT
Controllers
8279 (PKD)
Programmable
Keyboard/Display Controller
8291A, 8292, 8293 Programmable GPIB System
Talker, Listener, Controller
Intelligent devices like the 82077AA floppy disk controller and 8273 synchronous data link controller (see
Table 1-1) can preprocess serial data and perform control tasks which off-load the main system processor.
Higher overall system throughput is achieved and software complexity is greatly reduced. The intelligent
peripheral chips simplify master processor control tasks
by performing many functions externally in peripheral
hardware rather than internally in main processor software.
Intelligent peripherals also provide system flexibility.
They contain on-chip mode registers which are programmed by the master processor during system initialization. These control registers allow the peripheral to
be configured into many different operation modes. The
user-defined program for the peripheral is stored in
main system memory and is transferred to the peripheral’s registers whenever a mode change is required. Of
course, this type of flexibility requires software overhead in the master system which tends to limit the benefit derived from the peripheral chip.
In the past, intelligent peripherals were designed to
handle very specialized tasks. Separate chips were designed for communication disciplines, parallel I/O,
keyboard encoding, interval timing, CRT control, etc.
Yet, in spite of the large number of devices available
and the increased flexibility built into these chips, there
is still a large number of microcomputer peripheral
control tasks which are not satisfied.
With the introduction of the Universal Peripheral Interface (UPI) microcomputer, Intel has taken the intelligent peripheral concept a step further by providing an
intelligent controller that is fully user programmable. It
is a complete single-chip microcomputer which can
connect directly to a master processor data bus. It has
the same advantages of intelligence and flexibility
which previous peripheral chips offered. In addition,
UPIs are user-programmable: it has 1K/2K bytes of
ROM or EPROM memory for program storage plus
64/128/256 bytes of RAM memory UPI-41A,
41AH/42, 42AH respectively for data storage or initialization from the master processor. The UPI device
allows a designer to fully specify his control algorithm
in the peripheral chip without relying on the master
processor. Devices like printer controllers and keyboard scanners can be completely self-contained, relying on the master processor only for data transfer.
The UPI family currently consists of seven components:
# 8741A microcomputer with 1K EPROM memory
# 8741AH microcomputer with 1K OTP EPROM
memory
# 8041AH microcomputer with 1K ROM memory
# 8742 microcomputer with 2K EPROM memory
# 8742AH microcomputer with 2K ‘‘OTP’’ EPROM
memory
# 8042AH microcomputer with 2K ROM memory
# 8243 I/O expander device
The UPI-41A/41AH/42/42AH family of microcomputers are functionally equivalent except for the type
and amount of program memory available with each.
In addition, the UPI-41AH/42AH family has a Signature Row outside the EPROM Array. The UPI-41AH/
42AH family also has a Security Feature which renders
the EPROM Array unreadable when set.
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