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Description: The periphBitGrpSRVar macro sets the bit group to a given value in a memory location
addressed by parameter pAddr. All bits specified by GroupMask are affected. These bits are either set if
the corresponding bits in Mask value are also set or they are cleared if the corresponding bits in Mask value
are cleared.
The “SR” variant uses two non-interruptible instructions bfset and bfclr to accomplish the requested
operation. The bfset first sets the “one” bits in the destination location, and bfclr then clears the “zero” bits
there.
Caution: This macro is the optimal way how to set the specified group of bits to given value. However, it
must be kept in mind that during the short time between these two bit operations, the target memory
location goes through the third state where the bit group might contain invalid value (“ones” already set
but “zeroes” not yet cleared).
Example 2-24. periphBitGrpSRVar macro usage
periphBitGrpSRVar(0x007f, 10, &ArchIO.Pll.plldb);
This code sets the lower 7 bits of PLL Divide-By register to the value 10. Other bits in the register are not
affected.
2.5.8
periphBitGrpRS - set bit group to given value
Call(s):
void periphBitGrpRS(UWord16 GroupMask, UWord16 Mask,
UWord16 *pAddr);
Arguments:
Table 2-10. periphBitSet arguments
GroupMask
in
Group mask
Mask
in
“ones” bit mask.
pAddr
in
The memory address.
Description: The periphBitGrpRS macro sets the bit group to a given value in a memory location
addressed by parameter pAddr. All bits specified by GroupMask are affected. These bits are either set if
the corresponding bits in Mask value are also set or they are cleared if the corresponding bits in Mask value
are cleared.
This macro uses a single instruction to execute the operation and allows only constants as GroupMask and
Mask arguments. If the application requires the variable as argument, the periphBitGrpRSVar macro must
be used instead.
Example 2-25. periphBitGrpRS macro usage
periphBitGrpRS(0x0F00, 0x0100, &ArchIO.Adc1.adctl1);
DSC56800EX Quick Start User’s Guide, Rev. 2, 04/2015
Freescale Semiconductor, Inc.
2-15