Download Wireless World, Jun 1983

held in a rom module fitted to the
microcomputer’s memory-expansion sock­
ets. This rom module also contains a
variety of other useful firmware that is
frequently required for other laboratory
applications; for example, terminal emula­
tion, data smoothing, pattern matching
and so on.
Those situations that do not permit the
use of a general purpose laboratory
microcomputer (as described above) would
require a less costly approach — easily
achieved through the use of less expensive
single board microsystems. Indeed, we
have used a KIM micro 13 to perform
exactly the same measurements that were
undertaken by the 3032 and 8032 timer
systems - at about one seventh the cost. If
need be, further substantial cost reduc­
tions for the timer system could be
achieved by simply wiring up a 6502
c.p.u.y a 6522 VIA, some rom and a simple
icAd-out system.
The autliui is giaicful to Small Systems
Engineering Ltd (UK) tor their encourag­
ing help and invaluable assistance during
the preparation of this paper. He is also
Table 4. Program for timing transfer from 280 to PET.
3000 =
E84F =
E843 =
0001
=
F069 =
1000 = .
0100
0100 3E30
0102 210020
0105
0107
0108
0109
36AB
23
BC
C20501
;SO FTBO X POKE ROUTINE
;N U M BER OF BYTES TO SEN D
GENERATE TEST DATA
LO AD SO U RCE AD D R ESS
M O VE VALUE TO M EM O RY
;ALL DONE?
•INITIALISE TIM ER
010C
01 OF
0112
0115
0118
011B
011E
om
012/1
0125
010100
1143E8
215101
CD69F0
010100
114FE8
215201
CD69F0
FF
00
DPIKI:
LXI B,N1
LXI D rDDR
LXI H,DDRVAL
CALL POKE
LXI B,N1
LXI D, UPORT
LXI H.TMRSTOP
CALL POKE
RST 7
NOr
;SET PET DDR
;SET PAO HIGH
;CALL TO DDT
;PUT TIMER IN WAIT STATE
•GCNDDATATO PET M ICRO CO M PU TER .
0126
0127
012A
012D
0130
0133
0136
0139
013C
013F
0142
0145
0148
014B
014C
014D
014E
0151
0152
0153
0154
continued on page 58
Theauthor
Philip Etarkef. is _& * *i*n
. t i hi
the Deportment o l Computer Science a t
systems. The research topics in which
he is currently interested include:
author languages forcomputerassisted
;DISABLE INTERRUPTS
Dl
LXI B,1
LXI D, UPORT
LXI H,TMRGO
CALL POKE
LXI B,NSEND
LXI D, TOPET
LXI H,SBDATA
CALL POKE
LXI B,1
LXI D,UPORT
LXlH,TMRSTOP
CALL POKE
El
RST 7
BRK2:
NOP
JMP0
DDRVAL: DB 1
TM R ST O P: DB 1
TMRGO :
DB 0
END
F3
010100
114FE8
2155301
CD69F0
010010
110030
210020
CD69F0
010100
114FE8
215201
CD69F0
FB
FF
00
C30000
01
01
00
;START TIMER
;SEN D D A TA T O PET
;STO PTIM ER
;ENABLE INTERRUPTS
;CALL DDT
;W ARM START
Fig. 6. Arrangement for transferring data
between 280 in SO F T B O X and 6502 in PET.
wmmmmm
SOFTBOX.
PET
8255 p p.i.
PA
TARGET A D D R E SS FOR DATA
SO U RCE A D D R E SS OF DATA
PET USER PORT A D D R E SS
PET DATA DIRECTION REGISTER
TOPET EQU 3000H
S B D A T A EQU 2000H
UPORT EQU 59471
DDR
EQU 59459
N1
EQU 1
POKE
EQU 0F069H
N SE N D EQU 4096
ORG 100H
BEGIN
MVI A,30H
LXI H,SBDATA
FILL:
MVI M r0ABH
IN X H
CM P H
JN Z FILL
2000 =
PB
8255 p.pi.
PC
PA
PB
PC
j
6522 V.i.Q.
I
PA
PB
6520p.i,a.
PA + PB
C A hrC B
6520 p.ia.
PA^ +- CA 2
PAn
To timer.
IEEE-^88 bus:
43
C - IEEE control lines
p.p.i. - programmable peripheral interface
D - IE E E data tines
PA,PB,PC etc.-Ports A ,8,C
W IR ELESS W ORLD JU NE 1982