Download User Manual - MediaLB Interface Test Bench

Transcript
MediaLB Interface Test Bench
V2.2.X
8.5.6 mitb_t4333_3pin_1024fs_i_15q
Test Name
Description
Test
Configuration
Files
Port Mode
Device
mitb_t4333_3pin_1024fs_i_15q
1024xFs test with maximum blockwidth
- Concurrent Rx and Tx transfer of MediaLB isochronous data
- Blockwidth 2 x 15 quadlet per frame
mitb_t4333_3pin_1024fs_i_15q_cfg_setup.txt
mitb_t4333_3pin_1024fs_i_15q_cfg_start.txt
Interface
Mode
3-Pin
Clock
Speed
1024xFs
Manual setup of test via
GUI possible?
DUT MediaLB Configuration
Transferred
Physical
Data Types
Channel
Isoc
Channel
Address
0x01FE
PC1
0x000E
…
…
…
PC15
0x000E
Isoc Rx
PC16
0x0010
Isoc Tx
…
…
…
PC30
0x0010
Isoc Tx
…
0x0000
Configuration Tab
RS232 Port
DUT
MediaLB
Pin Mode
DUT
MediaLB
Clock
Speed
DUT MOST
Target
Address
User
configurable
3-Pin
1024xFs
0101h
Tx
Channel
Address
Rx
Channel
Address
Blockwidth
(quadlets/
frame)
Flow Control
Packet Size
(bytes)
Packet
Throughput
(kbit/s)
0x000E
0x0010
Test
Duration
(pkts)
188
1000
Isochronous Data Test Tab
Disable
5000
15
Disable
Packet
Counter
Pattern
Type
Enable
Byte
Counter
Table 8-77: mitb_t4333_3pin_1024fs_i_15q
User Manual
Page 166
Allocated Transfer
PC0
…
PC31
PGA GUI Configuration
Continuous
Test
YES
Copyright © 2011 SMSC
Document Version: V2.2.X- Date: 2011-12-09
Isoc Rx