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AMD Confidential
User Manual
April 2009
supported. A
indicates that the returned feature bit is zero and this feature is not
implemented and not supported.
7th
Generation
Feature
8th
Generation
(Base)
8th
Generation
Pre.-Rev. F
8th
Generation
Rev. F
Floating-Point Unit
Virtual Mode Extensions
Debugging Extensions1
Page-Size Extension
Time Stamp Counter
AMD Model-Specific Registers
Page Address Extensions
Machine Check Exception
CMPXCHG8B Instruction
APIC
SYSCALL and SYSRET
Memory Type Range Registers
Page Global Extension
Machine Check Architecture
Conditional Move Instruction
Page Attribute Table
Page Size Extensions (PSE-36)
No-execute page protection
SEM2
AMD extensions to MMX™
MMX™
FXSAVE/FXRSTOR
Fast FXSAVE/FXRSTOR
1 GB Paging feature
RDTSCP
Long Mode2
AMD Extensions to 3DNow!™
3DNow! Instructions
Virtualization Technology
Table 15-7: CPUID Extended Feature implementation
1
2
Only read and write to debug registers is supported, side effects are not implemented.
Controlled by FUSE state.
Appendix A
183