Download User Manual CORE-2

CORE-2
J4-BUS CONNECTOR
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
SIGNAL
CLKOUT
GND
/AWE
/AMS0
/AMS1
/ARE
/SMS
/SCKE
/SCAS
/SRAS
SA10
/SWE
SDQM1
SDQMD
A1
GND
A3
A2
A5
A4
A7
A6
A9
A8
A11
A10
A13
A12
A15
A14
A17
A16
A19
A18
D1
D0
D3
D2
D5
D4
D7
D6
D9
D8
D11
D10
D13
D12
D15
D14
DESCRIPTION
SDRAM Clock Output
Power supply return
Asynchronous Memory Write Enable
Asynchronous Memory Bank Selects
Asynchronous Memory Bank Selects
Asynchronous Memory Read Enable
SDRAM Bank Select
SDRAM Clock Enable
SDRAM Column Address Strobe
SDRAM Row Address Strobe
SDRAM A10 Signal
SDRAM Write Enable
Byte Enable or Data Mask
Byte Enable or Data Mask 2
Address Bus
Power supply return
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Address Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus
Data Bus