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Contents Pr el im in a ry List of Figures ........................................................................................................... iii List of Tables ............................................................................................................ iv Conventions, Abbreviations and Acronyms ................................................................... vii Preface .................................................................................................................... ix 1 Introduction ...................................................................................................... 1 1.1 Block Diagram.............................................................................................. 3 1.2 View of the phyCARD-i.MX 6 ............................................................................ 4 1.3 Minimum Requirements to Operate the phyCARD-i.MX 6........................................ 6 2 Pin Description ................................................................................................... 7 3 Jumpers .......................................................................................................... 13 4 Power.............................................................................................................. 17 4.1 Primary System Power (VDD_3V3) ...................................................................17 4.2 Backup Voltage (VSTBY) ................................................................................18 4.3 Power Management IC (U29) / Control Management IC (U17) ...............................18 4.3.1 Power Management IC (PMIC, U29).......................................................18 4.3.2 Control Management IC (CMIC, U17) .....................................................18 4.3.3 Power Domains.................................................................................19 4.4 Supply Voltage for external Logic ....................................................................21 5 Power Management ........................................................................................... 23 6 System Configuration and Booting....................................................................... 25 7 System Memory................................................................................................. 27 7.1 DDR3 SDRAM (U2-U9) ...................................................................................27 7.2 NAND Flash Memory (U13) .............................................................................27 7.3 I²C EEPROM (U10) ........................................................................................28 7.3.1 EEPROM Write Protection Control (J3) ...................................................28 8 SD / MMC Card Interfaces.................................................................................... 29 9 Serial Interfaces ............................................................................................... 31 9.1 Universal Asynchronous Interface ...................................................................32 9.2 USB OTG Interface........................................................................................32 9.3 USB Host Interface.......................................................................................33 9.4 Ethernet Interface .......................................................................................34 9.4.1 Ethernet PHY (U11) ...........................................................................34 9.4.2 MAC Address ....................................................................................35 9.5 I2C Interface ...............................................................................................35 9.6 SPI Interface...............................................................................................36 9.7 I2S Audio Interface (SSI) ...............................................................................36 10 General Purpose I/Os......................................................................................... 38 11 User LEDs......................................................................................................... 39 12 Debug Interface (X3)) ....................................................................................... 40 13 LVDS Display Interface....................................................................................... 43 13.1 LVDS Display Interface pixel mapping ..............................................................43 14 LVDS Camera Interface....................................................................................... 45 14.1 Signal Configuration (J31) ............................................................................45 15 Technical Specifications ..................................................................................... 46 © PHYTEC Messtechnik GmbH 2014 L-800e_0 i