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D D D D D R R R R R D R R FT FT FT FT A A A A R R D D D D R R A FT FT FT A A R R D D D R A FT FT A A R R D D The start address of the explicit standard frame-format section is defined in the CASFESA register with a value of 00h. The end of this section is defined in the CASFGSA register. F FT FT A A R R D D D Explicit standard-frame format identifier section (11-bit CAN ID) FT FT FT FT FT LPC2917/19 - ARM9 microcontroller with CAN and LIN 3.12.10.1 A A A A A Preliminary UM NXP Semiconductors D D In the explicit standard frame-format section of the ID look-up table, two CAN identifiers with their source CAN channels (SCCs) share one 32-bit word. Unused or disabled CAN identifiers can be marked by setting the message-disable bit. R A FT D R A To provide memory space for eight explicit standard frame-format identifiers, the CASFGSA register value is set to 10h. The identifier with Index 7 of this section is not used and is therefore disabled. 3.12.10.2 Group of standard frame-format identifier section (11-bit CAN ID) The start address of the group of the standard frame-format section is defined in the CASFGSA register with a value of 10h. The end of this section is defined in the CAEFESA register. In the group of standard frame-format sections, two CAN Identifiers with the same SCC share one 32-bit word and represent a range of CAN Identifiers to be accepted. Bits 31 down to 16 represent the lower boundary and bits 15 down to 0 represent the upper boundary of the range of CAN Identifiers. All identifiers within this range (including the boundary identifiers) are accepted. A whole group can be disabled and not used by the acceptance filter by setting the message-disable bit in the upper and lower boundary identifiers. To provide memory space for four Groups of standard frame-format identifiers the CAEFESA register value is set to 20h. The identifier group with Index 9 of this section is not used and is therefore disabled. 3.12.10.3 Explicit standard frame-format identifier section (29-bit CAN ID) The start address of the explicit extended frame-format section is defined in the CAEFESA register with a value of 20h. The end of this section is defined in the CAEFGSA register. In the explicit extended frame-format section, only one CAN Identifier with its SCC is programmed per address line. To provide memory space for four explicit extended frame-format identifiers the CAEFGSA register value is set to 30h. 3.12.10.4 Group of extended frame-format identifier section (29-bit CAN ID) The start address of the extended frame-format group is defined by the CAEFGSA register with a value of 30h. The end of this section is defined by the end-of-table address register CAEOTA. In the extended frame-format section group boundaries are programmed with a pair of address lines. The first is the lower boundary, the second the upper boundary. To provide memory space for two groups of extended frame-format Identifiers the CAEOTA register value is set to 40h. UMxxxxx User manual © NXP B.V. 2007. All rights reserved. Rev. 01.02. — 8 November 2007 177 of 263