Download PEF 82902 - Digi-Key

Transcript
PEF 82902
Index
8
Index
Frame Structure 27
Functional Description 27
A
L
Absolute Maximum Ratings 160
Address Space 114
Block Diagram 6
Block Error Counter 65
Layer 1
Activation / Deactivation 96
Loopbacks 104
LED Pins 12
Line Overload Protection 160
C
M
C/I Channel
Detailed Registers 124
Functional Description 49
C/I Codes
S-Transceiver 85
U-Transceiver 66
Controller Data Access (CDA) 30
Maintenance Channel 63
Microcontroller Clock Generation 23
Microcontroller Interfaces
Interface Selection 16
Parallel Microcontroller Interface 21
Serial Control Interface (SCI) 16
Monitor Channel
Detailed Registers 151
Error Treatment 45
Functional Description 41
Handshake Procedure 41
Interrupt Logic 48
Time-Out Procedure 48
B
D
DC Characteristics 161
D-Channel Access Control
Functional Description 51
State Machine 55
Differences between Q- and T-SMINT 178
O
E
Oscillator Circuitry 113
External Circuitry
S-Transceiver 110
P
F
Features 3
I
Identification
via Monitor Channel 47
via Register Access 139
Interrupts 114
IOM®-2 Interface
AC Characteristics 166
Activation/Deactivation 57
Detailed Registers 140
Data Sheet
Package Outlines 176
Parallel Microcontroller Interface
AC-Characteristics 169
Functional Description 21
Pin Configuration 5
Pin Definitions and Functions 7
Power Consumption 163
Power Supply Blocking 108
Power-On Reset 26, 174
R
Register Summary 116
Reset
Generation 23
191
2001-11-09