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XRT83SL30/L30EVAL User Manual BANNANA PLUGS MOUNTING HOLES POWER CIRCUITRY 1 T 10uF MHOLE 470 TP2 M2 1 T 1 R1 0.1uF C1 C2 0.1uF C3 + TP1 2 + + 1 MH B2 3VSUP J1 1 M1 1 B1 AVDD GROUND POINTS GND 1 3V C4 DVDD MHOLE 2 2 + + 1 T D2 LED TP4 + 10uF 0.1uF C5 C6 0.1uF C7 1 TP3 5.6V J2 1 MH D1 10uF + M3 1 T 1 MH MHOLE RVDD J3 2 + + M4 3VSUP 10uF 0.1uF C8 C9 1 + DVDD RVDD U6 1 MH 3VSUP 8 5 6 4 AVDD DVDD 12 CODES XC9572XL-100TQFP R14 R15 R16 470 470 R17 SCK SCS SDI SRST SDO ATAOS ICT NLCDE1 NLCDE0 INSBPV NLCD AISD QRPD 470 INT/EQC0 27 CS/EQC1 SCLK/EQC2 SDI/EQC4 SDO/EQC3 CLK R18 R20 36 49 26 44 45 68 70 43 42 59 58 51 52 71 85 82 81 41 28 29 30 86 8 79 78 27 59 33 34 77 76 74 72 35 38 39 40 1 + + 2 VCC 8 GND 12 31 36 DVDD R11 R12 R13 9 11 13 15 100 75 120 + + + + J4 9 7 10 6 3 2 11 SGT0640SCT 14 D4 15 1 16 SGT0640SCT F1 1 2 3 4 5 6 7 10 8 9 D3 FUSE 461 10 12 14 16 + + + + 1 2 3 T1 8 6 5 4 F2 FUSE 461 R9 OPEN RJ45 C14 S2 See Note 1 OPEN RPOS/RDATA RNEG/LCV RCLK TERSEL1 TERSEL0 61 62 60 8 7 6 5 RPOS RNEG RCLK 2 1 64 1 2 3 4 RPOS RNEG RCLK HEADER 4X2 XRT83L30 RXRES1 RXRES0 T2 RLOS RESET SR/DR LOOP1 LOOP0 63 1 11 1 T T3 DMO ATAOS ICT NLCDE1 NLCDE0 Tx=1:2, Rx=1:1 T Note 1: Transformer Selection INSBPV NLCD AISD QRPD MCLKT1 INT MCLKE1 CS/EQC1 SCLK/EQC2 SDI/EQC4 SDO/EQC3 R21 10k J6 1 CLK 0.0 3.0 6.2 9.1 2 4 6 8 + + + + 14 MCLKT1 13 MCLKE1 TRANSPOWER SMD606-05 HALO TG74-1505N1 T4 MCLKOUT 16 3VSUP 3VSUP 5 R6 R7 R8 R10 + S1 + + + S3 TPOS/TDATA TNEG/CODES TCLK GAUGE TRATIO RXTSEL TXTSEL 24 23 21 22 U3 DB25 C0 0.47uF 1 3.0 3 6.2 5 9.1 7 CODES CLKSEL2 CLKSEL1 CLKSEL0 25 90 91 93 92 4 JASEL1 JASEL0 J5 89 C2 C1 R2 R3 R4 R5 + 17 18 19 61 87 67 66 GND GND GND GND GND GND GND GND R19 4.7k 97 96 95 8 5 JABW/TERCNTL 21 31 44 62 69 75 84 100 36 47 48 RTIP + + 7 470 28 33 36 39 40 RXRES1 RXRES0 RESET SR/DR LOOP1 LOOP0 P1 1 14 2 15 3 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 TERSEL1 TERSEL0 46 64 63 TXTEST2 TXTEST1 TXTEST0 C3 10 T CODES C0 C1 C2 C3 1 GAUGE TRATIO RXTSEL TXTSEL JTAG 65 RVDD TVDD CLKSEL2 CLKSEL1 CLKSEL0 1 2 3 7 DGND 2 4 6 IO_1 IO_2 IO_3 IO_4 37 + + + + + + 3 9 H1 1 3 5 3VSUP JASEL1 JASEL0 TMS TCK TDI TDO 54 55 56 GNDPLL AGND JABW/TERCNTL 47 48 45 83 55 54 53 TTIP RRING RGND TXTEST2 TXTEST1 TXTEST0 TRING TAGND CLK_SYN HW/HOST RXMUTE RCLKE TCLKE TXON 15 32 17 20 50 53 57 58 6 T 1 94 60 56 52 10 VDDPLL AVDD U2 VDD VDD VDD VDD VDD VDD VDD HW/HOST RXMUTE RCLKE TCLKE TXON T5 VDD NC NC GND SP723 0.1uF 0.1uF C13 0.1uF C12 C10 26 38 51 88 5 57 98 U1 0.1uF C11 MHOLE 2 4 EXT CLOCK J7 MCLKT1 16.384MHz 1 + + MCLKE1 2 SMB1 R23 4.7k R24 36 R25 4.7k R22 OPEN R26 36 U4 U5 3VSUP 5 VCC 3VSUP 8 5 CLK VCC 8 CLK Design File Name = H:\XRT LIU\XRT83L30\SCHEMATIC\XRT83L30.DSN GND 4 GND EXAR Ad Infinitum 4 Title XRT83L30 SINGLE CHANNEL LIU 1.544MHz 2.048MHz Size C Date: Figure 6 XRT83SL30/L30EVAL Schematic Page 1 Page 5 of 21 Document Number XRT83L30 Monday, October 14, 2002 Rev A Sheet 1 of 1
