Download HSPICE Model Guide - Sam Annor Main Page

Transcript
LEVEL 40 Model Topology
Selecting MOSFET Models: Level 1-40
LEVEL 40 Model Topology
Figure 9-12 shows the topology of the LEVEL 40 model.
Figure 9-12: LEVEL 40 HP a-Si TFT Topology
RD
CGDO
Drain
Cgdi
Ids
Gate
CGSO
Cgsi
9-214
Source
RS
True-Hspice Device Models Reference Manual, Release 2001.4, revision A