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Errata Sheet
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Table 5
Deviations from Electrical- and Timing Specification
AC/DC/ADC
Deviation
Short Description
DTS_TC.P001
Test Conditions for Sensor Accuracy TTSA
90
FADC_TC.P003
Incorrect test condition specified in
datasheet for FADC parameter “Input
leakage current at VFAGND”.
90
MSC_TC.P001
Incorrect VOS limits for LVDS pads
specified in Data Sheet
New 90
PLL_TC.P005
PLL Parameters for fVCO > 780 MHz
91
Table 6
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Application Hints
Hint
Short Description
ADC_AI.H002
Minimizing Power Consumption of an
ADC Module
92
CPU_TC.H004
PCXI Handling Differences in
TriCore1.3.1
92
CPU_TC.H005
Wake-up from Idle/Sleep Mode
EBU_TC.H005
Potential live-lock situation on
concurrent CPU and PCP accesses to
external memories
95
EBU_TC.H008
Use of EBU standby mode
95
EBU_TC.H009
Legal Parameters Allow an Invalid Page
Mode Access to be Configured
96
FIRM_TC.H000
Reading the Flash Microcode Version
97
FlexRay_AI.H002
Timer 1 Precision
97
FlexRay_AI.H003
Select upper-/lower page for IBF1/IBF2 in
RAM test mode
97
TC1797, QS-AC
10/115
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New 94
Rel. 1.4, 25.01.2011