Download USER MANUAL

User’s Manual - Preliminary -
Philips Semiconductors
P89LPC932
TIMERS 0 AND 1
TCON
Address: 88h
7
6
5
4
3
2
1
0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Bit addressable
Reset Source(s): Any reset
Reset Value: 00000000B
BIT
SYMBOL
FUNCTION
TCON.7
TF1
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware
when the interrupt is processed, or by software (except in mode 6, see above, when it is
cleared in hardware).
TCON.6
TR1
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter 1 on/off.
TCON.5
TF0
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware
when the processor vectors to the interrupt routine, or by software. (except in mode 6, see
above, when it is cleared in hardware)
TCON.4
TR0
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter 0 on/off.
TCON.3
IE1
Interrupt 1 Edge flag. Set by hardware when external interrupt 1 edge is detected. Cleared
by hardware when the interrupt is processed, or by software.
TCON.2
IT1
Interrupt 1 Type control bit. Set/cleared by software to specify falling edge/low level
triggered external interrupts.
TCON.1
IE0
Interrupt 0 Edge flag. Set by hardware when external interrupt 0 edge is detected. Cleared
by hardware when the interrupt is processed, or by software.
TCON.0
IT0
Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level
triggered external interrupts.
Figure 7-3: Timer/Counter Control register (TCON)
PCLK
Tn Pin
Overflow
C/T = 0
C/T = 1
Control
TRn
TLn
(5-bits)
THn
(8-bits)
TFn
Toggle
Gate
Tn Pin
INTn Pin
ENTn
Figure 7-4: Timer/Counter 0 or 1 in Mode 0 (13-bit counter)
2003 Nov 6
Interrupt
44