Download Broad-Bandwidth FPGA-Based Digital Polyphase

Transcript
NASA USRP - Internship Final Report
Imagine a 16-element coefficient array, to be used in a direct-fft. The full coefficient list looks
like this:
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
These coefficients will be presented to the butterfly in order, from 0 to 15, repeatedly. This is
what you would expect with the stock casper blocks. It is also what happens in my block if the
step array is a '0' for that stage.
If the array is incremented to a '1' for that stage, the coefficients stored now would look like this:
0
2
4
6
8
10
12
14
And they would be presented to the butterfly in this pattern:
0
0
2
2
4
4
6
6
8
8
10
10
12
12
14
Because adjacent coefficients will be similar, this crudely emulates the original coefficient
vector. As you can see, considerable memory savings can be achieved in this manner.
Optimizations:
The optimizations used here are largely cannibalized from the biplex FFT. There was not quite
as much to optimize away from this design.
I used the same cheaper butterflies as in the biplex FFT. Thanks again, Suraj!
I took the mandatory delays at the beginning and end of the improved butterfly and folded them
together in the outside of the direct FFT. The first delay element for each stage also goes here.
This means that it is highly recommended to have at least one delay between each stage of the
FFT_Direct, since it only adds hardware to 1/4th of the datapath, and will greatly simplify
placement.
To Do:
30
Summer 2011 Session
14