Download KLQRUG, Kinetis L Peripheral Module Quick Reference

Running the "low_power_demo" project
10. Download the code to the board and start the debugger by pressing the Download
and Debug button.
11. The code will download into flash. The debugger screen will appear and pause at the
first instruction. Click the Go button to start running.
12. After you have selected Go, the software will print out some basic chip information,
and then write the low power demo menu to the terminal, something like the menu
below. Afterwards, selecting an entry will execute the corresponding test.
Power-on Reset
Low-voltage Detect Reset
KL2580pin
100pin
Low Power Line with Cortex M0+
SRAM Size: 16 KB
Silicon rev 15
Flash parameter version 0.0.8.0
Flash version ID 6.0.1.0
Flash size: 128 KB program flash, 4 KB protection region
LLWU configured pins PTC3 is LLWU wakeup source
LLWU configured modules as LLWU wakeup sources = 0x01,
*--------------D E B U G
D I S A B L E D------------------*
*------Press SW4 then press Reset to re-enable debug---------*
*------------------------------------------------------------*
*
KL Low Power DEMO
*
*
Sep 14 2012 11:44:03
*
*------------------------------------------------------------*
in Run Mode !
in PEE mode now at 48000000 Hz
Select the
0 for CASE
1 for CASE
2 for CASE
3 for CASE
4 for CASE
5 for CASE
6 for CASE
7 for CASE
8 for CASE
9 for CASE
A for CASE
B for CASE
C for CASE
D for CASE
E for CASE
F for CASE
G for CASE
H for CASE
I for CASE
J for CASE
K for CASE
L for CASE
>
desired operation
0: Enter VLLS0 with POR disabled NO POR
1: Enter VLLS0 with POR enabled with POR
2: Enter VLLS1
3: Enter LLS with LPTMR 1 second wakeup loop
4: Enter VLLS3 (Very Low Leakage STOP 3)
5: Enter LLS(Low Leakage Stop)
6: Enter VLPS(Very Low Power Stop)
7: Enter VLPR(Very Low Power RUN) in BLPE
8: Exit VLPR(Very Low Power RUN)
9: Enter VLPW(Very Low Power WAIT)
10: Enter WAIT from RUN or VLPW from VLPR
11: Enter Normal STOP from RUN or VLPS from VLPR
12: Enter PARTIAL STOP 1
13: Enter PARTIAL STOP 2
14: Running coremark 2 x in RUN CPO not CPO
15: Running coremark 2 x in VLPR with CPO not CPO
16: Enable LPTMR to wakeup every 5 seconds
17: Disable LPTMR wakeup
18: Enter VLPR in BLPI at Core Frequency of 4 MHz
19: Enter VLPR in BLPI at Core Frequency of 2 MHz
20: Enter Compute Mode
21: To enable DEBUG
Kinetis L Peripheral Module Quick Reference, Rev. 0, 09/2012
142
Freescale Semiconductor, Inc.