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Chapter 3 PowerMill Tutorials
experimental GAP run to determine whether you should
apply the vector-triplet method.
■
FFs (latches) in the circuit should be universally positive
edge-triggered (positive sensitive) or negative edge-triggered
(negative sensitive).
■
Clock skew in the estimated circuit (or block) should be
optimized and negligible.
If the sequential circuit does not satisfy each of these
requirements, the vector-triplet method might produce an
unrealistic result. You can run the GAP feature on this type of
circuit using the vector-pair method described in tutorial 5.
NOTE: The vector-pair method requires only PI information and
estimates the design as a combinational circuit. The only
drawback is that the quality of the result can be degraded,
especially for large circuits, since there is no control over the
state of the circuit during the GAP search.
Identifying the Pseudo-Primary Inputs
Before running the GAP feature using the vector-triplet method,
the power estimation algorithm needs to identify the output of
flip-flops and latches (the PPIs), so that they can be stimulated
appropriately during the searching of optimal stimuli.
There are three different methods for identifying the PPIs:
manual identification, automatic detection using PowerMill,
detection using the PathMill simulator.
Manually Specifying the PPIs
You can manually specify the PPIs, along with PIs, in the GAP
vector files. The vector files used for a GAP simulation, which
use the same format as the EPIC vector files, provide
information regarding the signals to be stimulated (for example,
name, io, and radix).