Download CPRI MegaCore Function v12.1 SP1 User Guide

2–6
Chapter 2: Getting Started
Compiling and Programming the Device
3. Double-click in the Assignment Name column and click I/O Standard.
4. Double-click in the Value column and click your standard (for example, 1.5-V
PCML).
5. In the new <<new>> row, repeat steps 2 to 4 for your CPRI IP core instance
gxb_rxdatain signal.
f For information about timing analyzers, refer to the Quartus II Help and the “Timing
Analysis” section in volume 3 of the Quartus II Handbook.
Compiling and Programming the Device
You can use the Start Compilation command on the Processing menu in the
Quartus II software to compile your design. After successfully compiling your design,
program the targeted Altera device with the Programmer and verify the design in
hardware.
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Before compiling your CPRI IP core or other incomplete CPRI design in the Quartus II
software, you must assign unconnected CPRI IP core signals to virtual pins.
f For information about compiling your design in the Quartus II software, refer to the
Quartus II Incremental Compilation for Hierarchical and Team-Based Design chapter in
volume 1 of the Quartus II Handbook. For information about programming an Altera
device, refer to the “Device Programming” section in volume 3 of the Quartus II
Handbook.
Instantiating Multiple CPRI IP Cores
If you want to instantiate multiple CPRI IP cores in an Arria II, Cyclone IV GX, or
Stratix IV GX device, to ensure your design optimizes its use of device pins, you must
observe the following additional requirements:
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You must ensure that the gxb_cal_blk_clk input and gxb_powerdown signals are
connected according to the requirements for your target device family.
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You must ensure that a single calibration clock source drives the
gxb_cal_blk_clk input to each CPRI IP core (or any other megafunction or
user logic that uses the ALTGX megafunction).
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When you merge multiple CPRI IP cores in a single transceiver block, the same
signal must drive gxb_powerdown to each of the CPRI IP core variations and
other megafunctions, Altera IP cores, and user logic that use the ALTGX
megafunction.
You must ensure that the instances each have different starting channel numbers.
Multiple CPRI IP cores in a single device must use distinct transceiver channels.
You enforce this restriction by specifying different starting channel numbers for
the distinct CPRI IP cores. Refer to Chapter 3, Parameter Settings.
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CPRI MegaCore Function
User Guide
To configure multiple CPRI IP cores in a single transceiver block, you must specify
in your Quartus Settings File (.qsf) that these CPRI link data lines are configured
March 2013 Altera Corporation