Download DP5 Programmer`s Guide

DP5 Programmer‟s Guide Rev A4
4.3.1
Acknowledge packet: “OK” ............................................................................................. 68
4.3.2
Acknowledge packet: “OK, with Interface Sharing Request” .......................................... 68
4.3.3
Acknowledge packet: “Sync Error” .................................................................................. 69
4.3.4
Acknowledge packet: “PID Error” ................................................................................... 69
4.3.5
Acknowledge packet: “LEN Error” .................................................................................. 69
4.3.6
Acknowledge packet: “Checksum Error” ......................................................................... 69
4.3.7
Acknowledge packet: “Bad Parameter”............................................................................ 69
4.3.8
Acknowledge packet: “Unrecognized Command” ........................................................... 70
4.3.9
Acknowledge packet: “PC5 Not Present”......................................................................... 70
4.3.10 Acknowledge packet: “Bad Hex Record”......................................................................... 70
4.3.11 Acknowledge packet: “FPGA Error”................................................................................ 70
4.3.12 Acknowledge packet: “CP2201 Not Found” .................................................................... 70
4.3.13 Acknowledge packet: “Scope Data Not Available” ......................................................... 71
4.3.14 Acknowledge packet: “I2C Error” .................................................................................... 71
5
ASCII Commands ............................................................................................................................. 72
5.1
Table 4 – ASCII Command Summary ...................................................................................... 73
5.1.1
AINP - Set the Input Polarity ............................................................................................ 76
5.1.2
AUO1 - Select AUX_OUT1 Signal .................................................................................. 77
5.1.3
AUO2 - Select AUX_OUT2 Signal .................................................................................. 78
5.1.4
BLRD - Select the Baseline Restorer „Down‟ Correction ................................................ 79
5.1.5
BLRM - Select the Baseline Restorer Mode..................................................................... 80
5.1.6
BLRU - Select the Baseline Restorer „Up‟ Correction ..................................................... 81
5.1.7
BOOT - Set Power-on State .............................................................................................. 82
5.1.8
CON1 – Select signal for AUX1 Connector ..................................................................... 83
5.1.9
CON2 – Select signal for AUX2 Connector ..................................................................... 84
5.1.10 CLCK - Select FPGA Clock ............................................................................................. 85
5.1.11 CUSP - Specify Non-Trapezoidal Shaping....................................................................... 86
5.1.12 DACF - Set DAC Offset ................................................................................................... 87
5.1.13 DACO - Select Signal for Output DAC ............................................................................ 88
5.1.14 GAIA - Set the Analog Gain Index................................................................................... 89
5.1.15 GAIF - Set the Fine Gain .................................................................................................. 90
5.1.16 GAIN - Set the Total Gain ................................................................................................ 91
5.1.17 GATE - Configure the GATE Input ................................................................................. 92
5.1.18 GPED - Select General Purpose Counter Edge ................................................................ 93
5.1.19 GPGA - General Purpose Counter Uses GATE ............................................................... 94
5.1.20 GPIN - Select the Source for the General Purpose Counter ............................................. 95
5.1.21 GPMC - General Purpose Counter is Cleared with MCA ................................................ 96
5.1.22 GPME - General Purpose Counter Uses MCA Enable ..................................................... 97
5.1.23 HVSE - Turn On/Off the PC5 High Voltage Supply ........................................................ 98
5.1.24 INOF - Set the Input Offset .............................................................................................. 99
5.1.25 INOG - Set the Input Offset Gain ................................................................................... 100
5.1.26 MCAC - Select Number of MCA Channels ................................................................... 101
5.1.27 MCAE - Initial State of MCA Enable............................................................................. 102
5.1.28 MCAS - Select the MCA Source .................................................................................... 103
5.1.29 MCSL - Set Low Threshold for MCS............................................................................. 104
5.1.30 MCSH - Set High Threshold for MCS ........................................................................... 105
5.1.31 MCST - Set the MCS Timebase ..................................................................................... 106
5.1.32 PAPS - Turn On/Off the Preamp Power Supplies .......................................................... 107
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