Download ST ST10F167 Data Sheet

DATA SHEET
ST10F167
3
Functional Description
The architecture of the ST10F167 combines advantagesof both RISC and CISC processors
and an advanced peripheral subsystem. The following block diagram gives an overview of
the different on-chip components and the high bandwidth internal bus structure of the
ST10F167.
16
Internal
FLASH
Memory
32
Internal
RAM
16
CPU-Core
Watchdog
16
PEC
OSC.
16
XRAM
Interrupt Controller
16
8
Port 6
8
Port 5
16
BRG
Port 2
CAPCOM1
CAPCOM2
BRG
Port 3
15
Figure 3 Block diagram
12/78
PWM
SSC
ASC usart
GPT1
GPT2
10-Bit ADC
16
External Bus
Controller
16
Port 4 Port 1 Port 0
CAN
42-1701-03
Port 7
8
Port 8
8
16