Download PCI334A Cabling
Transcript
PCI334A Features PCI334A Features MC68360 QUICC • • • • • • • • CPU32+ Processor (4.5 MIPS at 25 MHz) • 32-Bit Version of the CPU32 Core (Fully Compatible with the CPU32) • Background Debug Mode • Byte-Misaligned Addressing Four General Purpose Timers • Superset of MC68302 Timers • Four 16-Bit Timers or Two 32-Bit Timers Two Independent DMAs (IDMAs) • Single Address Mode for Fastest Transfers • Buffer Chaining and Auto Buffer Modes • Automatically Performs Efficient Packing System Integration Module (SIM60) • Bus Monitor • Double Bus Fault Monitor • Software Watchdog • Periodic Interrupt Timer • Low Power Stop Mode • Breakpoint Logic Provides On-Chip Hardware Breakpoints Four Serial Communication Controllers (SCC) • HDLC/SDLC™ • Signaling System #7 (SS7) • Binary Synchronous Communication (BISYNC) • Totally Transparent (Bit Streams) • Totally Transparent (Frame Based with Optional Cyclic Redundancy Check (CRC)) • Asynchronous HDLC • DDCMP™ • V.14 • X.21 Two Serial Management Controllers (SMC) • UART • Transparent • General Circuit Interface (GCI) Controller Communications Processor Module (CPM) • RISC Controller • 224 Buffer Descriptors • Supports Continuous Mode Transmission and Reception on All Serial Channels • 2.5 KBytes of Dual-Port RAM • 14 Serial DMA Channels Four Baud Rate Generators 19