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User Description
Copyright (C) Siemens AG 2002. All rights reserved.
Release V2.0
min. 2us
INTERDI
INTERCS
INTERDOD
INTERCLK
1
Startbit
1
2
2
2-bit Op code
01
1
2-bit Op code
00
1
1
1
3
3
6-bit address
000 000
2
6-bit address
110 000
2
4
4
5
5
6
6
D15
D14
The controller switches the signals to the pins with the trailing edge.
Startbit
EEPROM WRITE cycle
INTERCS
INTERDOD
INTERCLK
1
EEPROM ERASE/WRITE cycle
Data
D13
D0
Programming time
(max. 10ms)
3*SC
READY
Waiting for READY
The Write cycle follows
without interruption.
LSPM2
ComDeC
EEPROM ERASE/WRITE-Zyklus
Page 35
10/2002