Download TC1765 User`s Manual Peripheral Units

TC1765
Peripheral Units
General Purpose Timer Array (GPTA)
6.1.11
Programming of the GPTA Unit
A hierarchical top-down design approach may be used to implement a complex signal
processing unit as follows:
• Partition the complex signal processing unit into simple function units,
• Implement each simple function unit by configuring LTC and/or GTC cells which may
be tied together realizing a common signal operation.
• Implement necessary signal preprocessing tasks by configuring the FPC, PDL, DCM
and PLL cells accordingly.
• Define and configure all input/output port pins required as clock source, trigger input
or signal output.
Figure 6-12 summarizes all software tasks to be implemented for getting a GPTA unit
into operation.
Table 6-12
Software Tasks Controlling a GPTA Unit
Port Initialization
Definition of Electrical Port Characteristic
–
Configuration of Port Pin Direction (Input or
Output)
–
GPTA Shell Initialization
GPTA Module Clock Enable (fGPTA)
Must be the very first register of GPTA to be
programmed
–
Configuration of Interrupt Handling
–
GPTA Kernel Initialization
FPC:
PDL:
Selection of Operating Mode (Prescaler, Filter
or Feed-Through)
Selection of Operating Mode (Phase
Discriminator or Feed-Through)
Input Channel Selection
2- or 3-Sensor Mode Selection
Configuration of Prescaler Factor or Debounce PLL:
Mode
DCM:
Selection of Input Channel
Selection of Reset Event for Timer
Estimation of Input Signal Period
Width
Selection of Trigger Source for Capture Event
Configuration of Output Signal
Frequency
User’s Manual
6-102
V1.0, 2002-01